From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: <ira.weiny@intel.com>, Bjorn Helgaas <bhelgaas@google.com>,
Ben Widawsky <bwidawsk@kernel.org>,
Alison Schofield <alison.schofield@intel.com>,
"Lukas Wunner" <lukas@wunner.de>,
Vishal Verma <vishal.l.verma@intel.com>,
Dave Jiang <dave.jiang@intel.com>, <linux-kernel@vger.kernel.org>,
<linux-cxl@vger.kernel.org>, <linux-pci@vger.kernel.org>
Subject: Re: [PATCH V13 8/9] cxl/port: Retry reading CDAT on failure
Date: Tue, 19 Jul 2022 16:07:11 +0100 [thread overview]
Message-ID: <20220719160711.000078f9@Huawei.com> (raw)
In-Reply-To: <62d043d8bd04c_16fb9729422@dwillia2-xfh.jf.intel.com.notmuch>
On Thu, 14 Jul 2022 09:27:04 -0700
Dan Williams <dan.j.williams@intel.com> wrote:
> ira.weiny@ wrote:
> > From: Ira Weiny <ira.weiny@intel.com>
> >
> > The CDAT read may fail for a number of reasons but mainly it is possible
> > to get different parts of a valid state. The checksum in the CDAT table
> > protects against this.
>
> I don't know what "different parts of a valid state" means. The CDAT
> should not be changing as it is being read unless someone is issuing a
> set-partition while the DOE operation is happening.
Unfortunately not true. The device is allowed to change it with no input
from OS software at all.
From CDAT spec
"For Revision=1, the following changes are permitted during the
runtime
• Changes to the latency and bandwidth fields in DSLBIS
• Changes to the latency and bandwidth fields in SSLBIS
• Changes to the number of DSEMTS instances and their
contents
The changes to latency and bandwidth may represent events such
as failover or degradation that are internal to a component."
> Rather than
> arbitrary retries, block out set-partition while CDAT is being read.
Blocking that out is still useful even though we probably still need retries.
>
> You can use {set,clear}_exclusive_cxl_commands() to temporarily lock out
> set-partition while the CDAT read is happening.
>
> ...and since this series is only for enabling
next prev parent reply other threads:[~2022-07-19 15:07 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-05 15:49 [PATCH V13 0/9] CXL: Read CDAT and DSMAS data ira.weiny
2022-07-05 15:49 ` [PATCH V13 1/9] PCI: Add vendor ID for the PCI SIG ira.weiny
2022-07-05 15:49 ` [PATCH V13 2/9] PCI: Replace magic constant for PCI Sig Vendor ID ira.weiny
2022-07-05 15:49 ` [PATCH V13 3/9] PCI: Create PCIe library functions in support of DOE mailboxes ira.weiny
2022-07-07 16:22 ` Bjorn Helgaas
2022-07-11 19:13 ` Ira Weiny
2022-07-11 22:27 ` [PATCH V13.1] PCI/DOE: Add DOE mailbox support functions ira.weiny
2022-07-11 22:47 ` Matthew Wilcox
2022-07-14 14:54 ` Ira Weiny
2022-07-14 3:16 ` [PATCH V13 3/9] PCI: Create PCIe library functions in support of DOE mailboxes Dan Williams
2022-07-14 14:19 ` Ira Weiny
2022-07-05 15:49 ` [PATCH V13 4/9] cxl/pci: Create PCI DOE mailbox's for memory devices ira.weiny
2022-07-14 3:30 ` Dan Williams
2022-07-14 18:50 ` Ira Weiny
2022-07-05 15:49 ` [PATCH V13 5/9] driver-core: Introduce BIN_ATTR_ADMIN_{RO,RW} ira.weiny
2022-07-05 15:49 ` [PATCH V13 6/9] cxl/port: Read CDAT table ira.weiny
2022-07-14 15:38 ` Dan Williams
2022-07-14 19:55 ` Ira Weiny
2022-07-14 20:19 ` Dan Williams
2022-07-15 1:09 ` Ira Weiny
2022-07-05 15:49 ` [PATCH V13 7/9] cxl/port: Introduce cxl_cdat_valid() ira.weiny
2022-07-14 16:05 ` Dan Williams
2022-07-05 15:49 ` [PATCH V13 8/9] cxl/port: Retry reading CDAT on failure ira.weiny
2022-07-14 16:27 ` Dan Williams
2022-07-14 20:05 ` Ira Weiny
2022-07-14 20:13 ` Ira Weiny
2022-07-14 20:44 ` Dan Williams
2022-07-19 15:07 ` Jonathan Cameron [this message]
2022-07-05 15:49 ` [PATCH V13 9/9] cxl/port: Parse out DSMAS data from CDAT table ira.weiny
2022-07-14 16:32 ` Dan Williams
2022-07-14 19:58 ` Ira Weiny
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