From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: "Andy Gross" <agross@kernel.org>,
"Bjorn Andersson" <bjorn.andersson@linaro.org>,
"Konrad Dybcio" <konrad.dybcio@somainline.org>,
"Rob Herring" <robh+dt@kernel.org>,
"Jingoo Han" <jingoohan1@gmail.com>,
"Gustavo Pimentel" <gustavo.pimentel@synopsys.com>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Vinod Koul" <vkoul@kernel.org>,
"Kishon Vijay Abraham I" <kishon@ti.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>,
Johan Hovold <johan@kernel.org>,
linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
linux-phy@lists.infradead.org,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Subject: [PATCH v1 4/4] PCI: qcom-ep: Setup PHY to work in EP mode
Date: Tue, 26 Jul 2022 23:34:01 +0300 [thread overview]
Message-ID: <20220726203401.595934-5-dmitry.baryshkov@linaro.org> (raw)
In-Reply-To: <20220726203401.595934-1-dmitry.baryshkov@linaro.org>
Call phy_set_mode_ext() to notify the PHY driver that the PHY is being
used in the EP mode.
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/pci/controller/dwc/pcie-qcom-ep.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c
index ec99116ad05c..d17b255a909d 100644
--- a/drivers/pci/controller/dwc/pcie-qcom-ep.c
+++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c
@@ -240,6 +240,10 @@ static int qcom_pcie_enable_resources(struct qcom_pcie_ep *pcie_ep)
if (ret)
goto err_disable_clk;
+ ret = phy_set_mode_ext(pcie_ep->phy, PHY_MODE_PCIE, 1);
+ if (ret)
+ goto err_phy_exit;
+
ret = phy_power_on(pcie_ep->phy);
if (ret)
goto err_phy_exit;
--
2.35.1
prev parent reply other threads:[~2022-07-26 20:34 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-26 20:33 [PATCH v1 0/4] PCI: qcom: Support using the same PHY for both RC and EP Dmitry Baryshkov
2022-07-26 20:33 ` [PATCH v1 1/4] phy: qcom-qmp-pcie: split register tables into primary and secondary part Dmitry Baryshkov
2022-08-24 14:46 ` Manivannan Sadhasivam
2022-07-26 20:33 ` [PATCH v1 2/4] phy: qcom-qmp-pcie: support separate tables for EP mode Dmitry Baryshkov
2022-08-24 14:57 ` Manivannan Sadhasivam
2022-07-26 20:34 ` [PATCH v1 3/4] PCI: qcom: Setup PHY to work in RC mode Dmitry Baryshkov
2022-08-24 14:57 ` Manivannan Sadhasivam
2022-08-24 15:06 ` Manivannan Sadhasivam
2022-07-26 20:34 ` Dmitry Baryshkov [this message]
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