From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E04E1C433FE for ; Fri, 21 Oct 2022 11:19:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229866AbiJULTm (ORCPT ); Fri, 21 Oct 2022 07:19:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52400 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229799AbiJULTm (ORCPT ); Fri, 21 Oct 2022 07:19:42 -0400 Received: from bmailout1.hostsharing.net (bmailout1.hostsharing.net [IPv6:2a01:37:1000::53df:5f64:0]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3CFD332050; Fri, 21 Oct 2022 04:19:37 -0700 (PDT) Received: from h08.hostsharing.net (h08.hostsharing.net [IPv6:2a01:37:1000::53df:5f1c:0]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "*.hostsharing.net", Issuer "RapidSSL TLS DV RSA Mixed SHA256 2020 CA-1" (verified OK)) by bmailout1.hostsharing.net (Postfix) with ESMTPS id CF23930027A15; Fri, 21 Oct 2022 13:19:35 +0200 (CEST) Received: by h08.hostsharing.net (Postfix, from userid 100393) id B9D0519F8A; Fri, 21 Oct 2022 13:19:35 +0200 (CEST) Date: Fri, 21 Oct 2022 13:19:35 +0200 From: Lukas Wunner To: Lukasz Majczak Cc: bhelgaas@google.com, Rajat Jain , Vidya Sagar , upstream@semihalf.com, linux-pci@vger.kernel.org, LKML Subject: Re: [BUG] Intel Apollolake: PCIe bridge "loses" capabilities after entering D3Cold state Message-ID: <20221021111935.GB28729@wunner.de> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Fri, Oct 21, 2022 at 12:17:35PM +0200, Lukasz Majczak wrote: > While working with Vidya???s patch I have noticed that after > suspend/resume cycle on my Chromebook (Apollolake) PCIe bridge loses > its capabilities - the missing part is: > > Capabilities: [200 v1] L1 PM Substates > L1SubCap: PCI-PM_L1.2+ PCI-PM_L1.1+ ASPM_L1.2+ ASPM_L1.1+ L1_PM_Substates+ > PortCommonModeRestoreTime=40us PortTPowerOnTime=10us > L1SubCtl1: PCI-PM_L1.2+ PCI-PM_L1.1+ ASPM_L1.2+ ASPM_L1.1+ > T_CommonMode=40us LTR1.2_Threshold=98304ns > L1SubCtl2: T_PwrOn=60us > > Digging more I???ve found out that entering D3Cold state causes this You mean the capability is gone from lspci after D3cold? My understanding is that BIOS is responsible for populating config space. So this sounds like a BIOS bug. What's the BIOS vendor and version? (dmesg | grep DMI) Thanks, Lukas