From: Bjorn Helgaas <helgaas@kernel.org>
To: Vidya Sagar <vidyas@nvidia.com>
Cc: "sr@denx.de" <sr@denx.de>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: ECRC configuration if AER is owned by the firmware
Date: Mon, 31 Oct 2022 12:23:01 -0500 [thread overview]
Message-ID: <20221031172301.GA1198954@bhelgaas> (raw)
In-Reply-To: <d1b3b790-dbad-0cee-bf45-fb2eefb947ab@nvidia.com>
On Mon, Oct 31, 2022 at 10:35:40PM +0530, Vidya Sagar wrote:
> Hi,
> With the top of the tree codebase, pcie_set_ecrc_checking() is called from
> pci_aer_init().
> This flow doesn't really take into account the ownership of the AER
> registers, and it makes sense in the case of the Linux kernel owning the
> AER.
> But, if the owner of AER is firmware and not OS, then, ideally, any
> register/fields (including ECRC bits) are not supposed to be touched by the
> OS.
> Is my understanding correct?
> If so, then, isn't the current code violating that rule?
> Could you please comment on it?
I think you are correct and the current code violates the rule.
Bjorn
P.S. Your message was a multi-part message that will likely be
rejected by the vger mailing lists:
http://vger.kernel.org/majordomo-info.html
parent reply other threads:[~2022-10-31 17:23 UTC|newest]
Thread overview: expand[flat|nested] mbox.gz Atom feed
[parent not found: <d1b3b790-dbad-0cee-bf45-fb2eefb947ab@nvidia.com>]
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