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From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Manivannan Sadhasivam <mani@kernel.org>
Cc: Aman Gupta <aman1.gupta@samsung.com>,
	shradha.t@samsung.com, pankaj.dubey@samsung.com, kishon@ti.com,
	lpieralisi@kernel.org, kw@linux.com, shuah@kernel.org,
	linux-pci@vger.kernel.org, linux-kselftest@vger.kernel.org,
	Padmanabhan Rajanbabu <p.rajanbabu@samsung.com>
Subject: Re: [PATCH] selftests: pci: pci-selftest: add support for PCI endpoint driver test
Date: Tue, 1 Nov 2022 22:49:33 +0530	[thread overview]
Message-ID: <20221101171933.GD244012@thinkpad> (raw)
In-Reply-To: <20221101140216.GO54667@thinkpad>

On Tue, Nov 01, 2022 at 07:32:16PM +0530, Manivannan Sadhasivam wrote:
> On Fri, Oct 07, 2022 at 11:09:34AM +0530, Aman Gupta wrote:
> > This patch enables the support to perform selftest on PCIe endpoint
> > driver present in the system. The following tests are currently
> > performed by the selftest utility
> > 
> > 1. BAR Tests (BAR0 to BAR5)
> > 2. MSI Interrupt Tests (MSI1 to MSI32)
> > 3. Read Tests (For 1, 1024, 1025, 1024000, 1024001 Bytes)
> > 4. Write Tests (For 1, 1024, 1025, 1024000, 1024001 Bytes)
> > 5. Copy Tests (For 1, 1024, 1025, 1024000, 1024001 Bytes)
> > 
> > Signed-off-by: Aman Gupta <aman1.gupta@samsung.com>
> > Signed-off-by: Padmanabhan Rajanbabu <p.rajanbabu@samsung.com>
> > ---
> >  tools/testing/selftests/Makefile           |   1 +
> >  tools/testing/selftests/pci/.gitignore     |   1 +
> >  tools/testing/selftests/pci/Makefile       |   7 +
> >  tools/testing/selftests/pci/pci-selftest.c | 167 +++++++++++++++++++++
> >  4 files changed, 176 insertions(+)
> >  create mode 100644 tools/testing/selftests/pci/.gitignore
> >  create mode 100644 tools/testing/selftests/pci/Makefile
> >  create mode 100644 tools/testing/selftests/pci/pci-selftest.c
> > 
> > diff --git a/tools/testing/selftests/Makefile b/tools/testing/selftests/Makefile
> > index c2064a35688b..81584169a80f 100644
> > --- a/tools/testing/selftests/Makefile
> > +++ b/tools/testing/selftests/Makefile
> > @@ -49,6 +49,7 @@ TARGETS += net/forwarding
> >  TARGETS += net/mptcp
> >  TARGETS += netfilter
> >  TARGETS += nsfs
> > +TARGETS += pci
> >  TARGETS += pidfd
> >  TARGETS += pid_namespace
> >  TARGETS += powerpc
> > diff --git a/tools/testing/selftests/pci/.gitignore b/tools/testing/selftests/pci/.gitignore
> > new file mode 100644
> > index 000000000000..db01411b8200
> > --- /dev/null
> > +++ b/tools/testing/selftests/pci/.gitignore
> > @@ -0,0 +1 @@
> > +pci-selftest
> > diff --git a/tools/testing/selftests/pci/Makefile b/tools/testing/selftests/pci/Makefile
> > new file mode 100644
> > index 000000000000..76b7725a45ae
> > --- /dev/null
> > +++ b/tools/testing/selftests/pci/Makefile
> > @@ -0,0 +1,7 @@
> > +# SPDX-License-Identifier: GPL-2.0
> > +CFLAGS += -O2 -Wl,-no-as-needed -Wall
> > +LDFLAGS += -lrt -lpthread -lm
> > +
> > +TEST_GEN_PROGS = pci-selftest
> > +
> > +include ../lib.mk
> > diff --git a/tools/testing/selftests/pci/pci-selftest.c b/tools/testing/selftests/pci/pci-selftest.c
> > new file mode 100644
> > index 000000000000..73e8f3eb1982
> > --- /dev/null
> > +++ b/tools/testing/selftests/pci/pci-selftest.c
> 
> endpoint-test.c
> 
> > @@ -0,0 +1,167 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * PCI Endpoint Driver Test Program
> > + *
> > + * Copyright (c) 2022 Samsung Electronics Co., Ltd.
> > + *             https://www.samsung.com
> > + * Author: Aman Gupta <aman1.gupta@samsung.com>
> > + */
> > +
> > +#include <errno.h>
> > +#include <fcntl.h>
> > +#include <stdbool.h>
> > +#include <stdio.h>
> > +#include <stdlib.h>
> > +#include <sys/ioctl.h>
> > +#include <unistd.h>
> > +
> > +#include "../kselftest_harness.h"
> > +
> > +#define PCITEST_BAR		_IO('P', 0x1)
> > +#define PCITEST_LEGACY_IRQ	_IO('P', 0x2)
> > +#define PCITEST_MSI		_IOW('P', 0x3, int)
> > +#define PCITEST_WRITE		_IOW('P', 0x4, unsigned long)
> > +#define PCITEST_READ		_IOW('P', 0x5, unsigned long)
> > +#define PCITEST_COPY		_IOW('P', 0x6, unsigned long)
> > +#define PCITEST_MSIX		_IOW('P', 0x7, int)
> > +#define PCITEST_SET_IRQTYPE	_IOW('P', 0x8, int)
> > +#define PCITEST_GET_IRQTYPE	_IO('P', 0x9)
> > +#define PCITEST_CLEAR_IRQ	_IO('P', 0x10)
> > +
> > +static char *test_device = "/dev/pci-endpoint-test.0";
> > +
> > +struct xfer_param {
> > +	unsigned long size;
> > +	unsigned char flag;
> > +	};
> 
> Align '}'
> 
> > +
> > +FIXTURE(device)
> > +{
> > +	int fd;
> > +};
> > +
> > +FIXTURE_SETUP(device)
> > +{
> > +
> > +	self->fd = open(test_device, O_RDWR);
> > +
> > +	ASSERT_NE(-1, self->fd) {
> > +		TH_LOG("Can't open PCI Endpoint Test device\n");
> > +	}
> > +}
> > +
> > +FIXTURE_TEARDOWN(device)
> > +{
> > +	close(self->fd);
> > +}
> > +
> > +TEST_F(device, BAR_TEST)
> > +{
> > +	int ret = -EINVAL;
> 
> Ininitialization not required here and also in other functions.
> 
> > +	int final = 0;
> > +
> > +	for (int i = 0; i <= 5; i++) {
> > +		ret = ioctl(self->fd, PCITEST_BAR, i);
> > +
> > +		EXPECT_EQ(1, ret) {
> 
> The return value of all these IOCTL's are going to change when [1] get's merged.
> 
> [1] https://lore.kernel.org/linux-pci/20220824123010.51763-1-manivannan.sadhasivam@linaro.org/
> 
> I'd suggest to resubmit this selftest after that.
> 

Looks like we might end up removing the tests under tools/pci and just use this
one. I will CC you on the v3 of PCI test cleanup series. Please rebase this
patch on top of that and post after incorporating the review comments.

Thanks,
Mani

> Thanks,
> Mani
> 
> > +			TH_LOG("TEST FAILED FOR BAR %d\n", i);
> > +			final++;
> > +		}
> > +	}
> > +
> > +	ASSERT_EQ(0, final);
> > +}
> > +
> > +TEST_F(device, MSI_TEST)
> > +{
> > +	int ret = -EINVAL;
> > +	int final = 0;
> > +
> > +	ret = ioctl(self->fd, PCITEST_SET_IRQTYPE, 1);
> > +	ASSERT_EQ(1, ret);
> > +
> > +	for (int i = 1; i <= 32; i++) {
> > +		ret = ioctl(self->fd, PCITEST_MSI, i);
> > +		EXPECT_EQ(1, ret) {
> > +			TH_LOG("TEST FAILED FOR MSI%d\n", i);
> > +			final++;
> > +		}
> > +	}
> > +
> > +	ASSERT_EQ(0, final);
> > +}
> > +
> > +TEST_F(device, READ_TEST)
> > +{
> > +	int final = 0;
> > +	int ret = -EINVAL;
> > +	unsigned long SIZE[5] = {1, 1024, 1025, 1024000, 1024001};
> > +
> > +	ret = ioctl(self->fd, PCITEST_SET_IRQTYPE, 1);
> > +	ASSERT_EQ(1, ret);
> > +
> > +	struct xfer_param param;
> > +
> > +	param.flag = 0;
> > +	for (int i = 0; i < 5; i++) {
> > +		param.size = SIZE[i];
> > +		ret = ioctl(self->fd, PCITEST_READ, &param);
> > +		EXPECT_EQ(1, ret) {
> > +			TH_LOG("TEST FAILED FOR size =%ld.\n", SIZE[i]);
> > +			final++;
> > +		}
> > +	}
> > +
> > +	ASSERT_EQ(0, final);
> > +}
> > +
> > +TEST_F(device, WRITE_TEST)
> > +{
> > +	int final = 0;
> > +	int ret = -EINVAL;
> > +	unsigned long SIZE[5] = {1, 1024, 1025, 1024000, 1024001};
> > +
> > +	ret = ioctl(self->fd, PCITEST_SET_IRQTYPE, 1);
> > +	ASSERT_EQ(1, ret);
> > +
> > +	struct xfer_param param;
> > +
> > +	param.flag = 0;
> > +
> > +	for (int i = 0; i < 5; i++) {
> > +		param.size = SIZE[i];
> > +		ret = ioctl(self->fd, PCITEST_WRITE, &param);
> > +		EXPECT_EQ(1, ret) {
> > +			TH_LOG("TEST FAILED FOR size =%ld.\n", SIZE[i]);
> > +			final++;
> > +		}
> > +	}
> > +
> > +	ASSERT_EQ(0, final);
> > +}
> > +
> > +TEST_F(device, COPY_TEST)
> > +{
> > +	int final = 0;
> > +	int ret = -EINVAL;
> > +	unsigned long SIZE[5] = {1, 1024, 1025, 1024000, 1024001};
> > +
> > +	ret = ioctl(self->fd, PCITEST_SET_IRQTYPE, 1);
> > +	ASSERT_EQ(1, ret);
> > +
> > +	struct xfer_param param;
> > +
> > +	param.flag = 0;
> > +
> > +	for (int i = 0; i < 5; i++) {
> > +		param.size = SIZE[i];
> > +		ret = ioctl(self->fd, PCITEST_COPY, &param);
> > +		EXPECT_EQ(1, ret) {
> > +			TH_LOG("TEST FAILED FOR size =%ld.\n", SIZE[i]);
> > +			final++;
> > +		}
> > +	}
> > +
> > +	ASSERT_EQ(0, final);
> > +}
> > +TEST_HARNESS_MAIN
> > -- 
> > 2.17.1
> > 
> 
> -- 
> மணிவண்ணன் சதாசிவம்

-- 
மணிவண்ணன் சதாசிவம்

  reply	other threads:[~2022-11-01 17:19 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20221007053726epcas5p357c35abb79327fee6327bc6493e0178c@epcas5p3.samsung.com>
2022-10-07  5:39 ` [PATCH] selftests: pci: pci-selftest: add support for PCI endpoint driver test Aman Gupta
2022-10-11 10:58   ` Kishon Vijay Abraham I
2022-10-21  6:56     ` Aman Gupta
2022-10-21  8:00       ` 'Manivannan Sadhasivam'
2022-11-01 14:02   ` Manivannan Sadhasivam
2022-11-01 17:19     ` Manivannan Sadhasivam [this message]
2022-12-21  8:30   ` Shunsuke Mie
2022-12-23 13:39     ` Aman Gupta/FDS SW /SSIR/Engineer/Samsung Electronics
2022-12-22 16:58   ` Shuah Khan
2022-12-22 17:45     ` Manivannan Sadhasivam
2022-12-22 17:49       ` Shuah Khan
2022-12-23 15:02         ` Manivannan Sadhasivam
2022-12-23 16:31           ` Shuah Khan
2022-12-27  5:15             ` Aman Gupta/FDS SW /SSIR/Engineer/Samsung Electronics
2023-01-17 19:59               ` Bjorn Helgaas
2023-01-26 20:57                 ` Shuah Khan
2023-02-14  6:16               ` 'Manivannan Sadhasivam'
2023-03-08 11:06                 ` Aman Gupta/FDS SW /SSIR/Engineer/Samsung Electronics
2023-01-17  8:12             ` Aman Gupta/FDS SW /SSIR/Engineer/Samsung Electronics
     [not found] <CGME20221219043044epcas5p3d5476a9a5d6ae7a5cd2bb3fa92708e73@epcas5p3.samsung.com>
2022-12-19  4:30 ` Aman Gupta/FDS SW /SSIR/Engineer/Samsung Electronics
2022-12-21  7:24   ` 'Manivannan Sadhasivam'
2022-12-23 13:45     ` Aman Gupta/FDS SW /SSIR/Engineer/Samsung Electronics

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