Re: 16-bit _SEG vs 8 bit PCIe Flit mode Segment

[Dimitri Sivanich <sivanich@hpe.com>]

Bjorn,

Thanks for letting us know about this.

This is just to let you know that, while we are still investigating this,
our UV3 Broadwell era systems do use more than 8 bits for the segment #.

From lscpi on UV3:
  1007:3f:08.0 System peripheral: Intel Corporation Xeon E7 v2/Xeon E5 v2/Core i7 QPI Link 0 (rev 07)

Dimitri

On Tue, Nov 01, 2022 at 09:49:05AM -0500, Bjorn Helgaas wrote:
> ACPI r6.5, sec 6.5.6, currently says the low 16 bits of _SEG are the
> PCI Segment Group number.  PCIe r6.0, sec 2.2.1.2, added Flit mode
> with TLP headers that may contain an 8-bit Segment number.
> 
> ACPI currently says _SEG is purely a software thing and has no
> connection to any physical entities.  But this may get a little blurry
> when Segment numbers appear in TLPs.  For example, AER header logs
> will likely contain the Flit Segment, and we'll need to correlate that
> with the _SEG-derived identifiers Linux uses.
> 
> One possibility is to reduce the width of _SEG to 8 bits to match the
> Flit mode Segment and require them to be identical.
> 
> I'm trying to figure out whether that would break any existing
> systems.  I've heard rumors that large systems like SGI UV may use
> more than 8 bits of _SEG.  But I don't know any details.
> 
> Bjorn