From: Jonathan Derrick <jonathan.derrick@linux.dev>
To: Vidya Sagar <vidyas@nvidia.com>
Cc: "Manivannan Sadhasivam" <mani@kernel.org>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Bjorn Helgaas" <helgaas@kernel.org>,
linux-pci@vger.kernel.org, "Lukas Wunner" <lukas@wunner.de>,
"Pali Rohár" <pali@kernel.org>,
"Jonathan Derrick" <jonathan.derrick@linux.dev>
Subject: [PATCH v2 5/7] PCI: pci-bridge-emul: Provide a helper to set behavior
Date: Thu, 10 Nov 2022 12:50:13 -0700 [thread overview]
Message-ID: <20221110195015.207-6-jonathan.derrick@linux.dev> (raw)
In-Reply-To: <20221110195015.207-1-jonathan.derrick@linux.dev>
Add a handler to set behavior of a PCI or PCIe register. Add the
appropriate enums to specify the register's Read-Only, Read-Write, and
Write-1-to-Clear behaviors.
Signed-off-by: Jonathan Derrick <jonathan.derrick@linux.dev>
---
drivers/pci/pci-bridge-emul.c | 19 +++++++++++++++++++
drivers/pci/pci-bridge-emul.h | 10 ++++++++++
2 files changed, 29 insertions(+)
diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c
index 9334b2dd4764..3c1a683ece66 100644
--- a/drivers/pci/pci-bridge-emul.c
+++ b/drivers/pci/pci-bridge-emul.c
@@ -46,6 +46,25 @@ struct pci_bridge_reg_behavior {
u32 w1c;
};
+void pci_bridge_emul_set_reg_behavior(struct pci_bridge_emul *bridge,
+ bool pcie, int reg, u32 val,
+ enum pci_bridge_emul_reg_behavior type)
+{
+ struct pci_bridge_reg_behavior *behavior;
+
+ if (pcie)
+ behavior = &bridge->pcie_cap_regs_behavior[reg / 4];
+ else
+ behavior = &bridge->pci_regs_behavior[reg / 4];
+
+ if (type == PCI_BRIDGE_EMUL_REG_BEHAVIOR_RO)
+ behavior->ro = val;
+ else if (type == PCI_BRIDGE_EMUL_REG_BEHAVIOR_RW)
+ behavior->rw = val;
+ else /* PCI_BRIDGE_EMUL_REG_BEHAVIOR_W1C */
+ behavior->w1c = val;
+}
+
static const
struct pci_bridge_reg_behavior pci_regs_behavior[PCI_STD_HEADER_SIZEOF / 4] = {
[PCI_VENDOR_ID / 4] = { .ro = ~0 },
diff --git a/drivers/pci/pci-bridge-emul.h b/drivers/pci/pci-bridge-emul.h
index 2a0e59c7f0d9..b2401d58518c 100644
--- a/drivers/pci/pci-bridge-emul.h
+++ b/drivers/pci/pci-bridge-emul.h
@@ -72,6 +72,12 @@ struct pci_bridge_emul;
typedef enum { PCI_BRIDGE_EMUL_HANDLED,
PCI_BRIDGE_EMUL_NOT_HANDLED } pci_bridge_emul_read_status_t;
+enum pci_bridge_emul_reg_behavior {
+ PCI_BRIDGE_EMUL_REG_BEHAVIOR_RO,
+ PCI_BRIDGE_EMUL_REG_BEHAVIOR_RW,
+ PCI_BRIDGE_EMUL_REG_BEHAVIOR_W1C,
+};
+
struct pci_bridge_emul_ops {
/*
* Called when reading from the regular PCI bridge
@@ -161,4 +167,8 @@ int pci_bridge_emul_conf_read(struct pci_bridge_emul *bridge, int where,
int pci_bridge_emul_conf_write(struct pci_bridge_emul *bridge, int where,
int size, u32 value);
+void pci_bridge_emul_set_reg_behavior(struct pci_bridge_emul *bridge,
+ bool pcie, int reg, u32 val,
+ enum pci_bridge_emul_reg_behavior type);
+
#endif /* __PCI_BRIDGE_EMUL_H__ */
--
2.30.2
next prev parent reply other threads:[~2022-11-10 19:53 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-10 19:50 [PATCH v2 0/7] PCIe Hotplug Slot Emulation driver Jonathan Derrick
2022-11-10 19:50 ` [PATCH v2 1/7] PCI: Allow for indirecting capability registers Jonathan Derrick
2022-11-10 21:10 ` Pali Rohár
2022-11-10 19:50 ` [PATCH v2 2/7] PCI: Add pcie_port_slot_emulated stub Jonathan Derrick
2022-11-10 19:50 ` [PATCH v2 3/7] PCI: pciehp: Expose the poll loop to other drivers Jonathan Derrick
2022-11-10 19:50 ` [PATCH v2 4/7] PCI: Move pci_dev_str_match to search.c Jonathan Derrick
2022-11-10 19:50 ` Jonathan Derrick [this message]
2022-11-10 21:02 ` [PATCH v2 5/7] PCI: pci-bridge-emul: Provide a helper to set behavior Pali Rohár
2022-11-10 19:50 ` [PATCH v2 6/7] PCI: pciehp: Add hotplug slot emulation driver Jonathan Derrick
2022-11-10 19:50 ` [PATCH v2 7/7] PCI: pciehp: Wire up pcie_port_emulate_slot and Jonathan Derrick
2022-11-10 21:17 ` [PATCH v2 0/7] PCIe Hotplug Slot Emulation driver Pali Rohár
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