From: Sascha Hauer <s.hauer@pengutronix.de>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
"Pengutronix Kernel Team" <kernel@pengutronix.de>,
"NXP Linux Team" <linux-imx@nxp.com>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Richard Zhu" <hongxing.zhu@nxp.com>,
"Rob Herring" <robh@kernel.org>
Subject: Re: [PATCH v2] PCI: imx6: Initialize PHY before deasserting core reset
Date: Mon, 14 Nov 2022 08:15:19 +0100 [thread overview]
Message-ID: <20221114071519.GF3143@pengutronix.de> (raw)
In-Reply-To: <20221111215301.GA749191@bhelgaas>
On Fri, Nov 11, 2022 at 03:53:01PM -0600, Bjorn Helgaas wrote:
> On Fri, Nov 11, 2022 at 04:57:46PM +0100, Lorenzo Pieralisi wrote:
> > On Tue, 1 Nov 2022 10:57:14 +0100, Sascha Hauer wrote:
> > > When the PHY is the reference clock provider then it must be initialized
> > > and powered on before the reset on the client is deasserted, otherwise
> > > the link will never come up. The order was changed in cf236e0c0d59.
> > > Restore the correct order to make the driver work again on boards where
> > > the PHY provides the reference clock. This also changes the order for
> > > boards where the Soc is the PHY reference clock divider, but this
> > > shouldn't do any harm.
> > >
> > > [...]
> >
> > Applied to pci/dwc, thanks!
> >
> > [1/1] PCI: imx6: Initialize PHY before deasserting core reset
> > https://git.kernel.org/lpieralisi/pci/c/ae6b9a65af48
>
> cf236e0c0d59 appeared in v6.0; should we add a stable tag to this?
Good idea, yes.
Sascha
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prev parent reply other threads:[~2022-11-14 7:15 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-01 9:57 [PATCH v2] PCI: imx6: Initialize PHY before deasserting core reset Sascha Hauer
2022-11-11 15:57 ` Lorenzo Pieralisi
2022-11-11 21:53 ` Bjorn Helgaas
2022-11-14 7:15 ` Sascha Hauer [this message]
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