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From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Joerg Roedel <joro@8bytes.org>,
	Will Deacon <will@kernel.org>,
	linux-pci@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Marc Zyngier <maz@kernel.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jason Gunthorpe <jgg@mellanox.com>,
	Dave Jiang <dave.jiang@intel.com>,
	Alex Williamson <alex.williamson@redhat.com>,
	Kevin Tian <kevin.tian@intel.com>,
	Dan Williams <dan.j.williams@intel.com>,
	Logan Gunthorpe <logang@deltatee.com>,
	Ashok Raj <ashok.raj@intel.com>, Jon Mason <jdmason@kudzu.us>,
	Allen Hubbe <allenbh@gmail.com>, Jason Gunthorpe <jgg@nvidia.com>
Subject: [patch V2 05/21] genirq/irqdomain: Provide IRQ_DOMAIN_FLAG_MSI_PARENT
Date: Mon, 21 Nov 2022 15:36:24 +0100 (CET)	[thread overview]
Message-ID: <20221121083325.794346723@linutronix.de> (raw)
In-Reply-To: 20221121083210.309161925@linutronix.de

The new PCI/IMS (Interrupt Message Store) functionality is allowing
hardware vendors to provide implementation specific storage for the MSI
messages. This can be device memory and also host/guest memory, e.g. in
queue memory which is shared with the hardware.

This requires device specific MSI interrupt domains, which cannot be
achieved by expanding the existing PCI/MSI interrupt domain concept which is
a global interrupt domain shared by all PCI devices on a particular (IOMMU)
segment:

                                         |--- device 1
     [Vector]---[Remapping]---[PCI/MSI]--|...
                                         |--- device N

This works because the PCI/MSI[-X] space is uniform, but falls apart with
PCI/IMS which is implementation defined and must be available along with
PCI/MSI[-X] on the same device.

To support PCI/MSI[-X] plus PCI/IMS on the same device it is required to
rework the PCI/MSI interrupt domain hierarchy concept in the following way:

                              |--- [PCI/MSI] device 1
     [Vector]---[Remapping]---|...
                              |--- [PCI/MSI] device N

That allows in the next step to create multiple interrupt domains per device:


                              |--- [PCI/MSI] device 1
                              |--- [PCI/IMS] device 1
     [Vector]---[Remapping]---|...
                              |--- [PCI/MSI] device N
                              |--- [PCI/IMS] device N

So the domain which previously created the global PCI/MSI domain must now
act as parent domain for the per device domains.

The hierarchy depth is the same as before, but the PCI/MSI domains are then
device specific and not longer global.

Provide IRQ_DOMAIN_FLAG_MSI_PARENT, which allows to identify these parent
domains, along with helpers to query it.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
---
 include/linux/irqdomain.h |   14 ++++++++++++++
 1 file changed, 14 insertions(+)
--- a/include/linux/irqdomain.h
+++ b/include/linux/irqdomain.h
@@ -189,6 +189,9 @@ enum {
 	/* Irq domain doesn't translate anything */
 	IRQ_DOMAIN_FLAG_NO_MAP		= (1 << 6),
 
+	/* Irq domain is a MSI parent domain */
+	IRQ_DOMAIN_FLAG_MSI_PARENT	= (1 << 8),
+
 	/*
 	 * Flags starting from IRQ_DOMAIN_FLAG_NONCORE are reserved
 	 * for implementation specific purposes and ignored by the
@@ -551,6 +554,11 @@ static inline bool irq_domain_is_msi_rem
 
 extern bool irq_domain_hierarchical_is_msi_remap(struct irq_domain *domain);
 
+static inline bool irq_domain_is_msi_parent(struct irq_domain *domain)
+{
+	return domain->flags & IRQ_DOMAIN_FLAG_MSI_PARENT;
+}
+
 #else	/* CONFIG_IRQ_DOMAIN_HIERARCHY */
 static inline int irq_domain_alloc_irqs(struct irq_domain *domain,
 			unsigned int nr_irqs, int node, void *arg)
@@ -596,6 +604,12 @@ irq_domain_hierarchical_is_msi_remap(str
 {
 	return false;
 }
+
+static inline bool irq_domain_is_msi_parent(struct irq_domain *domain)
+{
+	return false;
+}
+
 #endif	/* CONFIG_IRQ_DOMAIN_HIERARCHY */
 
 #else /* CONFIG_IRQ_DOMAIN */


  parent reply	other threads:[~2022-11-21 14:37 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-21 14:36 [patch V2 00/21] genirq, PCI/MSI: Support for per device MSI and PCI/IMS - Part 2 API rework Thomas Gleixner
2022-11-21 14:36 ` [patch V2 01/21] genirq/msi: Move IRQ_DOMAIN_MSI_NOMASK_QUIRK to MSI flags Thomas Gleixner
2022-11-24 13:44   ` Marc Zyngier
2022-11-21 14:36 ` [patch V2 02/21] genirq/irqdomain: Make struct irqdomain readable Thomas Gleixner
2022-11-24 13:45   ` Marc Zyngier
2022-11-21 14:36 ` [patch V2 03/21] genirq/irqdomain: Rename irq_domain::dev to irq_domain::pm_dev Thomas Gleixner
2022-11-24 13:46   ` Marc Zyngier
2022-11-21 14:36 ` [patch V2 04/21] genirq/msi: Create msi_api.h Thomas Gleixner
2022-11-24 13:47   ` Marc Zyngier
2022-11-21 14:36 ` Thomas Gleixner [this message]
2022-11-21 14:36 ` [patch V2 06/21] genirq/irqdomain: Provide IRQ_DOMAIN_FLAG_MSI_DEVICE Thomas Gleixner
2022-11-21 14:36 ` [patch V2 07/21] genirq/msi: Check for invalid MSI parent domain usage Thomas Gleixner
2022-11-21 14:36 ` [patch V2 08/21] genirq/msi: Add pointers for per device irq domains Thomas Gleixner
2022-11-24 14:56   ` Marc Zyngier
2022-11-24 15:02     ` Thomas Gleixner
2022-11-21 14:36 ` [patch V2 09/21] genirq/msi: Make MSI descriptor iterators device domain aware Thomas Gleixner
2022-11-24 15:46   ` Marc Zyngier
2022-11-24 15:55     ` Thomas Gleixner
2022-11-21 14:36 ` [patch V2 10/21] genirq/msi: Make msi_get_virq() " Thomas Gleixner
2022-11-21 14:36 ` [patch V2 11/21] genirq/msi: Rename msi_add_msi_desc() to msi_insert_msi_desc() Thomas Gleixner
2022-11-21 14:36 ` [patch V2 12/21] genirq/msi: Make descriptor allocation device domain aware Thomas Gleixner
2022-11-21 14:36 ` [patch V2 13/21] genirq/msi: Make descriptor freeing " Thomas Gleixner
2022-11-21 14:36 ` [patch V2 14/21] genirq/msi: Make msi_add_simple_msi_descs() device " Thomas Gleixner
2022-11-21 14:36 ` [patch V2 15/21] genirq/msi: Provide new domain id based interfaces for freeing interrupts Thomas Gleixner
2022-11-21 14:36 ` [patch V2 16/21] genirq/msi: Provide new domain id allocation functions Thomas Gleixner
2022-11-21 14:36 ` [patch V2 17/21] PCI/MSI: Use msi_domain_alloc/free_irqs_all_locked() Thomas Gleixner
2022-11-21 14:36 ` [patch V2 18/21] platform-msi: Switch to the domain id aware MSI interfaces Thomas Gleixner
2022-11-21 14:36 ` [patch V2 19/21] bus: fsl-mc-msi: Switch to domain id aware interfaces Thomas Gleixner
2022-11-21 14:36 ` [patch V2 20/21] oc: ti: ti_sci_inta_msi: Switch to domain id aware MSI functions Thomas Gleixner
2022-11-21 14:36 ` [patch V2 21/21] genirq/msi: Remove unused alloc/free interfaces Thomas Gleixner
2022-11-23  2:12 ` [patch V2 00/21] genirq, PCI/MSI: Support for per device MSI and PCI/IMS - Part 2 API rework Tian, Kevin

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