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From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Joerg Roedel <joro@8bytes.org>,
	Will Deacon <will@kernel.org>,
	linux-pci@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Marc Zyngier <maz@kernel.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jason Gunthorpe <jgg@mellanox.com>,
	Dave Jiang <dave.jiang@intel.com>,
	Alex Williamson <alex.williamson@redhat.com>,
	Kevin Tian <kevin.tian@intel.com>,
	Dan Williams <dan.j.williams@intel.com>,
	Logan Gunthorpe <logang@deltatee.com>,
	Ashok Raj <ashok.raj@intel.com>, Jon Mason <jdmason@kudzu.us>,
	Allen Hubbe <allenbh@gmail.com>
Subject: [patch V2 14/21] genirq/msi: Make msi_add_simple_msi_descs() device domain aware
Date: Mon, 21 Nov 2022 15:36:35 +0100 (CET)	[thread overview]
Message-ID: <20221121083326.283961511@linutronix.de> (raw)
In-Reply-To: 20221121083210.309161925@linutronix.de

Allocating simple interrupt descriptors in the core code has to be multi
device irqdomain aware for the upcoming PCI/IMS support.

Change the interfaces to take a domain id into account. Use the internal
control struct for transport of arguments.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 kernel/irq/msi.c |   99 ++++++++++++++++++++++++++++++++-----------------------
 1 file changed, 59 insertions(+), 40 deletions(-)

--- a/kernel/irq/msi.c
+++ b/kernel/irq/msi.c
@@ -151,39 +151,6 @@ int msi_domain_insert_msi_desc(struct de
 	return msi_insert_desc(dev, desc, domid, init_desc->msi_index);
 }
 
-/**
- * msi_add_simple_msi_descs - Allocate and initialize MSI descriptors
- * @dev:	Pointer to the device for which the descriptors are allocated
- * @index:	Index for the first MSI descriptor
- * @ndesc:	Number of descriptors to allocate
- *
- * Return: 0 on success or an appropriate failure code.
- */
-static int msi_add_simple_msi_descs(struct device *dev, unsigned int index, unsigned int ndesc)
-{
-	unsigned int idx, last = index + ndesc - 1;
-	struct msi_desc *desc;
-	int ret;
-
-	lockdep_assert_held(&dev->msi.data->mutex);
-
-	for (idx = index; idx <= last; idx++) {
-		desc = msi_alloc_desc(dev, 1, NULL);
-		if (!desc)
-			goto fail_mem;
-		ret = msi_insert_desc(dev, desc, MSI_DEFAULT_DOMAIN, idx);
-		if (ret)
-			goto fail;
-	}
-	return 0;
-
-fail_mem:
-	ret = -ENOMEM;
-fail:
-	msi_free_msi_descs_range(dev, index, last);
-	return ret;
-}
-
 static bool msi_desc_match(struct msi_desc *desc, enum msi_desc_filter filter)
 {
 	switch (filter) {
@@ -252,6 +219,45 @@ void msi_domain_free_msi_descs_range(str
 	msi_domain_free_descs(dev, &ctrl);
 }
 
+/**
+ * msi_domain_add_simple_msi_descs - Allocate and initialize MSI descriptors
+ * @dev:	Pointer to the device for which the descriptors are allocated
+ * @ctrl:	Allocation control struct
+ *
+ * Return: 0 on success or an appropriate failure code.
+ */
+static int msi_domain_add_simple_msi_descs(struct device *dev, struct msi_ctrl *ctrl)
+{
+	struct msi_desc *desc;
+	unsigned int idx;
+	int ret, baseidx;
+
+	lockdep_assert_held(&dev->msi.data->mutex);
+
+	if (!msi_ctrl_range_valid(dev, ctrl))
+		return -EINVAL;
+
+	baseidx = msi_get_domain_base_index(dev, ctrl->domid);
+	if (baseidx < 0)
+		return baseidx;
+
+	for (idx = ctrl->first; idx <= ctrl->last; idx++) {
+		desc = msi_alloc_desc(dev, 1, NULL);
+		if (!desc)
+			goto fail_mem;
+		ret = msi_insert_desc(dev, desc, ctrl->domid, idx);
+		if (ret)
+			goto fail;
+	}
+	return 0;
+
+fail_mem:
+	ret = -ENOMEM;
+fail:
+	msi_domain_free_descs(dev, ctrl);
+	return ret;
+}
+
 void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
 {
 	*msg = entry->msg;
@@ -821,11 +827,19 @@ int msi_domain_populate_irqs(struct irq_
 {
 	struct msi_domain_info *info = domain->host_data;
 	struct msi_domain_ops *ops = info->ops;
+	struct msi_ctrl ctrl = {
+		.domid	= MSI_DEFAULT_DOMAIN,
+		.first  = virq_base,
+		.last	= virq_base + nvec - 1,
+	};
 	struct msi_desc *desc;
 	int ret, virq;
 
+	if (!msi_ctrl_range_valid(dev, &ctrl))
+		return -EINVAL;
+
 	msi_lock_descs(dev);
-	ret = msi_add_simple_msi_descs(dev, virq_base, nvec);
+	ret = msi_domain_add_simple_msi_descs(dev, &ctrl);
 	if (ret)
 		goto unlock;
 
@@ -846,7 +860,7 @@ int msi_domain_populate_irqs(struct irq_
 fail:
 	for (--virq; virq >= virq_base; virq--)
 		irq_domain_free_irqs_common(domain, virq, 1);
-	msi_free_msi_descs_range(dev, virq_base, virq_base + nvec - 1);
+	msi_domain_free_descs(dev, &ctrl);
 unlock:
 	msi_unlock_descs(dev);
 	return ret;
@@ -1020,14 +1034,19 @@ static int __msi_domain_alloc_irqs(struc
 	return 0;
 }
 
-static int msi_domain_add_simple_msi_descs(struct msi_domain_info *info,
-					   struct device *dev,
-					   unsigned int num_descs)
+static int msi_domain_alloc_simple_msi_descs(struct device *dev,
+					     struct msi_domain_info *info,
+					     unsigned int num_descs)
 {
+	struct msi_ctrl ctrl = {
+		.domid	= MSI_DEFAULT_DOMAIN,
+		.last	= num_descs - 1,
+	};
+
 	if (!(info->flags & MSI_FLAG_ALLOC_SIMPLE_MSI_DESCS))
 		return 0;
 
-	return msi_add_simple_msi_descs(dev, 0, num_descs);
+	return msi_domain_add_simple_msi_descs(dev, &ctrl);
 }
 
 /**
@@ -1058,7 +1077,7 @@ int msi_domain_alloc_irqs_descs_locked(s
 	}
 
 	/* Frees allocated descriptors in case of failure. */
-	ret = msi_domain_add_simple_msi_descs(info, dev, nvec);
+	ret = msi_domain_alloc_simple_msi_descs(dev, info, nvec);
 	if (ret)
 		goto free;
 


  parent reply	other threads:[~2022-11-21 14:37 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-21 14:36 [patch V2 00/21] genirq, PCI/MSI: Support for per device MSI and PCI/IMS - Part 2 API rework Thomas Gleixner
2022-11-21 14:36 ` [patch V2 01/21] genirq/msi: Move IRQ_DOMAIN_MSI_NOMASK_QUIRK to MSI flags Thomas Gleixner
2022-11-24 13:44   ` Marc Zyngier
2022-11-21 14:36 ` [patch V2 02/21] genirq/irqdomain: Make struct irqdomain readable Thomas Gleixner
2022-11-24 13:45   ` Marc Zyngier
2022-11-21 14:36 ` [patch V2 03/21] genirq/irqdomain: Rename irq_domain::dev to irq_domain::pm_dev Thomas Gleixner
2022-11-24 13:46   ` Marc Zyngier
2022-11-21 14:36 ` [patch V2 04/21] genirq/msi: Create msi_api.h Thomas Gleixner
2022-11-24 13:47   ` Marc Zyngier
2022-11-21 14:36 ` [patch V2 05/21] genirq/irqdomain: Provide IRQ_DOMAIN_FLAG_MSI_PARENT Thomas Gleixner
2022-11-21 14:36 ` [patch V2 06/21] genirq/irqdomain: Provide IRQ_DOMAIN_FLAG_MSI_DEVICE Thomas Gleixner
2022-11-21 14:36 ` [patch V2 07/21] genirq/msi: Check for invalid MSI parent domain usage Thomas Gleixner
2022-11-21 14:36 ` [patch V2 08/21] genirq/msi: Add pointers for per device irq domains Thomas Gleixner
2022-11-24 14:56   ` Marc Zyngier
2022-11-24 15:02     ` Thomas Gleixner
2022-11-21 14:36 ` [patch V2 09/21] genirq/msi: Make MSI descriptor iterators device domain aware Thomas Gleixner
2022-11-24 15:46   ` Marc Zyngier
2022-11-24 15:55     ` Thomas Gleixner
2022-11-21 14:36 ` [patch V2 10/21] genirq/msi: Make msi_get_virq() " Thomas Gleixner
2022-11-21 14:36 ` [patch V2 11/21] genirq/msi: Rename msi_add_msi_desc() to msi_insert_msi_desc() Thomas Gleixner
2022-11-21 14:36 ` [patch V2 12/21] genirq/msi: Make descriptor allocation device domain aware Thomas Gleixner
2022-11-21 14:36 ` [patch V2 13/21] genirq/msi: Make descriptor freeing " Thomas Gleixner
2022-11-21 14:36 ` Thomas Gleixner [this message]
2022-11-21 14:36 ` [patch V2 15/21] genirq/msi: Provide new domain id based interfaces for freeing interrupts Thomas Gleixner
2022-11-21 14:36 ` [patch V2 16/21] genirq/msi: Provide new domain id allocation functions Thomas Gleixner
2022-11-21 14:36 ` [patch V2 17/21] PCI/MSI: Use msi_domain_alloc/free_irqs_all_locked() Thomas Gleixner
2022-11-21 14:36 ` [patch V2 18/21] platform-msi: Switch to the domain id aware MSI interfaces Thomas Gleixner
2022-11-21 14:36 ` [patch V2 19/21] bus: fsl-mc-msi: Switch to domain id aware interfaces Thomas Gleixner
2022-11-21 14:36 ` [patch V2 20/21] oc: ti: ti_sci_inta_msi: Switch to domain id aware MSI functions Thomas Gleixner
2022-11-21 14:36 ` [patch V2 21/21] genirq/msi: Remove unused alloc/free interfaces Thomas Gleixner
2022-11-23  2:12 ` [patch V2 00/21] genirq, PCI/MSI: Support for per device MSI and PCI/IMS - Part 2 API rework Tian, Kevin

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