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From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: Will Deacon <will@kernel.org>,
	linux-pci@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Marc Zyngier <maz@kernel.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jason Gunthorpe <jgg@mellanox.com>, Andrew Lunn <andrew@lunn.ch>,
	Gregory Clement <gregory.clement@bootlin.com>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Ammar Faizi <ammarfaizi2@gnuweeb.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Lorenzo Pieralisi <lpieralisi@kernel.org>,
	Nishanth Menon <nm@ti.com>, Tero Kristo <kristo@kernel.org>,
	Santosh Shilimkar <ssantosh@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	Vinod Koul <vkoul@kernel.org>, Sinan Kaya <okaya@kernel.org>,
	Andy Gross <agross@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Shameerali Kolothum Thodi  <shameerali.kolothum.thodi@huawei.com>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Shawn Guo <shawnguo@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>
Subject: [patch V2 30/40] genirq/gic-v3-mbi: Switch to MSI parent
Date: Mon, 21 Nov 2022 15:40:06 +0100 (CET)	[thread overview]
Message-ID: <20221121140050.197229661@linutronix.de> (raw)
In-Reply-To: 20221121135653.208611233@linutronix.de

All platform MSI users and the PCI/MSI code handle per device MSI domains
when the irqdomain associated to the device provides MSI parent
functionality.

Remove the "global" PCI/MSI and platform domain related code and provide
the MSI parent functionality by filling in msi_parent_ops.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Marc Zyngier <maz@kernel.org>
---
 drivers/irqchip/irq-gic-v3-mbi.c |  122 ++++++++++-----------------------------
 1 file changed, 32 insertions(+), 90 deletions(-)

--- a/drivers/irqchip/irq-gic-v3-mbi.c
+++ b/drivers/irqchip/irq-gic-v3-mbi.c
@@ -18,6 +18,8 @@
 
 #include <linux/irqchip/arm-gic-v3.h>
 
+#include "irq-gic-msi-lib.h"
+
 struct mbi_range {
 	u32			spi_start;
 	u32			nr_spis;
@@ -29,6 +31,15 @@ static phys_addr_t		mbi_phys_base;
 static struct mbi_range		*mbi_ranges;
 static unsigned int		mbi_range_nr;
 
+static void mbi_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
+{
+	msg[0].address_hi = upper_32_bits(mbi_phys_base + GICD_SETSPI_NSR);
+	msg[0].address_lo = lower_32_bits(mbi_phys_base + GICD_SETSPI_NSR);
+	msg[0].data = data->hwirq;
+
+	iommu_dma_compose_msi_msg(irq_data_get_msi_desc(data), msg);
+}
+
 static struct irq_chip mbi_irq_chip = {
 	.name			= "MBI",
 	.irq_mask		= irq_chip_mask_parent,
@@ -36,11 +47,11 @@ static struct irq_chip mbi_irq_chip = {
 	.irq_eoi		= irq_chip_eoi_parent,
 	.irq_set_type		= irq_chip_set_type_parent,
 	.irq_set_affinity	= irq_chip_set_affinity_parent,
+	.irq_compose_msi_msg	= mbi_compose_msi_msg,
 };
 
-static int mbi_irq_gic_domain_alloc(struct irq_domain *domain,
-				       unsigned int virq,
-				       irq_hw_number_t hwirq)
+static int mbi_irq_gic_domain_alloc(struct irq_domain *domain, unsigned int virq,
+				    irq_hw_number_t hwirq)
 {
 	struct irq_fwspec fwspec;
 	struct irq_data *d;
@@ -138,85 +149,30 @@ static void mbi_irq_domain_free(struct i
 }
 
 static const struct irq_domain_ops mbi_domain_ops = {
+	.select			= gic_msi_lib_irq_domain_select,
 	.alloc			= mbi_irq_domain_alloc,
 	.free			= mbi_irq_domain_free,
 };
 
-static void mbi_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
-{
-	msg[0].address_hi = upper_32_bits(mbi_phys_base + GICD_SETSPI_NSR);
-	msg[0].address_lo = lower_32_bits(mbi_phys_base + GICD_SETSPI_NSR);
-	msg[0].data = data->parent_data->hwirq;
-
-	iommu_dma_compose_msi_msg(irq_data_get_msi_desc(data), msg);
-}
-
-#ifdef CONFIG_PCI_MSI
-/* PCI-specific irqchip */
-static void mbi_mask_msi_irq(struct irq_data *d)
-{
-	pci_msi_mask_irq(d);
-	irq_chip_mask_parent(d);
-}
+#define MBI_MSI_FLAGS_REQUIRED  (MSI_FLAG_USE_DEF_DOM_OPS |	\
+				 MSI_FLAG_USE_DEF_CHIP_OPS)
 
-static void mbi_unmask_msi_irq(struct irq_data *d)
-{
-	pci_msi_unmask_irq(d);
-	irq_chip_unmask_parent(d);
-}
+#define MBI_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK |	\
+				 MSI_FLAG_PCI_MSIX      |	\
+				 MSI_FLAG_MULTI_PCI_MSI)
 
-static struct irq_chip mbi_msi_irq_chip = {
-	.name			= "MSI",
-	.irq_mask		= mbi_mask_msi_irq,
-	.irq_unmask		= mbi_unmask_msi_irq,
-	.irq_eoi		= irq_chip_eoi_parent,
-	.irq_compose_msi_msg	= mbi_compose_msi_msg,
+static const struct msi_parent_ops gic_v3_mbi_msi_parent_ops = {
+	.supported_flags	= MBI_MSI_FLAGS_SUPPORTED,
+	.required_flags		= MBI_MSI_FLAGS_REQUIRED,
+	.bus_select_token	= DOMAIN_BUS_NEXUS,
+	.bus_select_mask	= MATCH_PCI_MSI | MATCH_PLATFORM_MSI,
+	.prefix			= "MBI-",
+	.init_dev_msi_info	= gic_msi_lib_init_dev_msi_info,
 };
 
-static struct msi_domain_info mbi_msi_domain_info = {
-	.flags	= (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
-		   MSI_FLAG_PCI_MSIX | MSI_FLAG_MULTI_PCI_MSI),
-	.chip	= &mbi_msi_irq_chip,
-};
-
-static int mbi_allocate_pci_domain(struct irq_domain *nexus_domain,
-				   struct irq_domain **pci_domain)
-{
-	*pci_domain = pci_msi_create_irq_domain(nexus_domain->parent->fwnode,
-						&mbi_msi_domain_info,
-						nexus_domain);
-	if (!*pci_domain)
-		return -ENOMEM;
-
-	return 0;
-}
-#else
-static int mbi_allocate_pci_domain(struct irq_domain *nexus_domain,
-				   struct irq_domain **pci_domain)
+static int mbi_allocate_domain(struct irq_domain *parent)
 {
-	*pci_domain = NULL;
-	return 0;
-}
-#endif
-
-/* Platform-MSI specific irqchip */
-static struct irq_chip mbi_pmsi_irq_chip = {
-	.name			= "pMSI",
-};
-
-static struct msi_domain_ops mbi_pmsi_ops = {
-};
-
-static struct msi_domain_info mbi_pmsi_domain_info = {
-	.flags	= (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS),
-	.ops	= &mbi_pmsi_ops,
-	.chip	= &mbi_pmsi_irq_chip,
-};
-
-static int mbi_allocate_domains(struct irq_domain *parent)
-{
-	struct irq_domain *nexus_domain, *pci_domain, *plat_domain;
-	int err;
+	struct irq_domain *nexus_domain;
 
 	nexus_domain = irq_domain_create_tree(parent->fwnode,
 					      &mbi_domain_ops, NULL);
@@ -225,22 +181,8 @@ static int mbi_allocate_domains(struct i
 
 	irq_domain_update_bus_token(nexus_domain, DOMAIN_BUS_NEXUS);
 	nexus_domain->parent = parent;
-
-	err = mbi_allocate_pci_domain(nexus_domain, &pci_domain);
-
-	plat_domain = platform_msi_create_irq_domain(parent->fwnode,
-						     &mbi_pmsi_domain_info,
-						     nexus_domain);
-
-	if (err || !plat_domain) {
-		if (plat_domain)
-			irq_domain_remove(plat_domain);
-		if (pci_domain)
-			irq_domain_remove(pci_domain);
-		irq_domain_remove(nexus_domain);
-		return -ENOMEM;
-	}
-
+	nexus_domain->flags |= IRQ_DOMAIN_FLAG_MSI_PARENT;
+	nexus_domain->msi_parent_ops = &gic_v3_mbi_msi_parent_ops;
 	return 0;
 }
 
@@ -303,7 +245,7 @@ int __init mbi_init(struct fwnode_handle
 
 	pr_info("Using MBI frame %pa\n", &mbi_phys_base);
 
-	ret = mbi_allocate_domains(parent);
+	ret = mbi_allocate_domain(parent);
 	if (ret)
 		goto err_free_mbi;
 


  parent reply	other threads:[~2022-11-21 14:51 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-21 14:39 [patch V2 00/40] genirq, irqchip: Convert ARM MSI handling to per device MSI domains Thomas Gleixner
2022-11-21 14:39 ` [patch V2 01/40] irqchip/irq-mvebu-icu: Fix works by chance pointer assignment Thomas Gleixner
2022-11-24 12:50   ` Marc Zyngier
2022-11-21 14:39 ` [patch V2 02/40] ACPI/IORT: Make prototype of iort_pmsi_get_dev_id() always available Thomas Gleixner
2022-11-21 15:13   ` Robin Murphy
2022-11-21 14:39 ` [patch V2 03/40] irqchip/gic-v2m: Include arm-gic-common.h Thomas Gleixner
2022-11-24 12:51   ` Marc Zyngier
2022-11-21 14:39 ` [patch V2 04/40] irqchip/gic-v2m: Mark a few functions __init Thomas Gleixner
2022-11-24 12:54   ` Marc Zyngier
2022-11-21 14:39 ` [patch V2 05/40] irqchip/ti-sci-inta: Fix kernel doc Thomas Gleixner
2022-11-24 12:54   ` Marc Zyngier
2022-11-21 14:39 ` [patch V2 06/40] PCI/MSI: Provide static key for parent mask/unmask Thomas Gleixner
2022-11-24 13:04   ` Marc Zyngier
2022-11-24 13:17     ` Thomas Gleixner
2022-11-24 13:38       ` Marc Zyngier
2022-11-25  0:11         ` Thomas Gleixner
2023-05-22 14:19           ` Thomas Gleixner
2023-05-23 10:25             ` Marc Zyngier
2023-05-23 13:05               ` Thomas Gleixner
2023-05-31  8:35                 ` Marc Zyngier
2022-11-21 14:39 ` [patch V2 07/40] irqchip/gic-v3: Make gic_irq_domain_select() robust for zero parameter count Thomas Gleixner
2022-11-21 14:39 ` [patch V2 08/40] genirq/irqdomain: Remove the param count restriction from select() Thomas Gleixner
2022-11-21 14:39 ` [patch V2 09/40] genirq/msi: Extend msi_parent_ops Thomas Gleixner
2022-11-21 14:39 ` [patch V2 10/40] irqchip: Provide irq-gic-lib Thomas Gleixner
2022-11-21 14:39 ` [patch V2 11/40] irqchip/gic-v3-its: Provide MSI parent infrastructure Thomas Gleixner
2022-11-21 14:39 ` [patch V2 12/40] irqchip/gic-msi-lib: Prepare for PCI MSI/MSIX Thomas Gleixner
2022-11-21 14:39 ` [patch V2 13/40] irqchip/gic-v3-its: Provide MSI parent for PCI/MSI[-X] Thomas Gleixner
2022-11-21 14:39 ` [patch V2 14/40] genirq/irqdomain: Add BUS_DOMAIN_DEVICE_MSI Thomas Gleixner
2022-11-21 14:39 ` [patch V2 15/40] irqchip/gic-msi-lib: Prepare for DEVICE MSI to replace platform MSI Thomas Gleixner
2022-11-21 14:39 ` [patch V2 16/40] platform-msi: Prepare for real per device domains Thomas Gleixner
2022-11-21 14:39 ` [patch V2 17/40] irqchip: Convert all platform MSI users to the new API Thomas Gleixner
2022-11-21 14:39 ` [patch V2 18/40] genirq/msi: Provide optional translation op Thomas Gleixner
2022-11-21 14:39 ` [patch V2 19/40] genirq/msi: Split msi_domain_alloc_irq_at() Thomas Gleixner
2022-11-21 14:39 ` [patch V2 20/40] genirq/msi: Provide BUS DEVICE_MSI_WIRED Thomas Gleixner
2022-11-21 14:39 ` [patch V2 21/40] genirq/msi: Optionally use dev->fwnode for device domain Thomas Gleixner
2022-11-21 14:39 ` [patch V2 22/40] genirq/msi: Provide allocation/free functions for "wired" MSI interrupts Thomas Gleixner
2022-11-21 14:39 ` [patch V2 23/40] genirq/irqdomain: Reroute device MSI create_mapping Thomas Gleixner
2022-11-21 14:39 ` [patch V2 24/40] irqchip/mbigen: Prepare for real per device MSI Thomas Gleixner
2022-11-21 14:39 ` [patch V2 25/40] irqchip/gic-msi-lib: Prepare for DOMAIN_BUS_WIRED_TO_MSI Thomas Gleixner
2022-11-21 14:40 ` [patch V2 26/40] irqchip/gic-v3-its: Switch platform MSI to MSI parent Thomas Gleixner
2022-11-21 14:40 ` [patch V2 27/40] irqchip/mbigen: Remove platform_msi_create_device_domain() fallback Thomas Gleixner
2022-11-21 14:40 ` [patch V2 28/40] genirq/msi: Remove platform_msi_create_device_domain() Thomas Gleixner
2022-11-21 14:40 ` [patch V2 29/40] genirq/gic-v3-mbi: Remove unused wired MSI mechanics Thomas Gleixner
2022-11-21 14:40 ` Thomas Gleixner [this message]
2022-11-21 14:40 ` [patch V2 31/40] irqchip/gic-v2m: Switch to device MSI Thomas Gleixner
2022-11-21 14:40 ` [patch V2 32/40] genirq/msi: Provide MSI_FLAG_PARENT_PM_DEV Thomas Gleixner
2022-11-21 14:40 ` [patch V2 33/40] irqchip/imx-mu-msi: Switch to MSI parent Thomas Gleixner
2022-11-28 20:47   ` Frank Li
2022-11-28 21:03     ` Thomas Gleixner
2022-11-21 14:40 ` [patch V2 34/40] irqchip/irq-mvebu-icu: Prepare for real per device MSI Thomas Gleixner
2022-11-21 14:40 ` [patch V2 35/40] irqchip/mvebu-gicp: Switch to MSI parent Thomas Gleixner
2022-11-21 14:40 ` [patch V2 36/40] irqchip/mvebu-odmi: Switch to parent MSI Thomas Gleixner
2022-11-21 14:40 ` [patch V2 37/40] irqchip/irq-mvebu-sei: Switch to MSI parent Thomas Gleixner
2022-11-21 14:40 ` [patch V2 38/40] irqchip/irq-mvebu-icu: Remove platform MSI leftovers Thomas Gleixner
2022-11-21 14:40 ` [patch V2 39/40] genirq/msi: " Thomas Gleixner
2022-11-21 14:40 ` [patch V2 40/40] genirq/msi: Move msi_device_data to core Thomas Gleixner
2023-01-11 19:29 ` [patch V2 00/40] genirq, irqchip: Convert ARM MSI handling to per device MSI domains Frank Li

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