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From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Joerg Roedel <joro@8bytes.org>,
	Will Deacon <will@kernel.org>,
	linux-pci@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Marc Zyngier <maz@kernel.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jason Gunthorpe <jgg@mellanox.com>,
	Dave Jiang <dave.jiang@intel.com>,
	Alex Williamson <alex.williamson@redhat.com>,
	Kevin Tian <kevin.tian@intel.com>,
	Dan Williams <dan.j.williams@intel.com>,
	Logan Gunthorpe <logang@deltatee.com>,
	Ashok Raj <ashok.raj@intel.com>, Jon Mason <jdmason@kudzu.us>,
	Allen Hubbe <allenbh@gmail.com>, Jason Gunthorpe <jgg@nvidia.com>
Subject: [patch V3 05/22] genirq/irqdomain: Provide IRQ_DOMAIN_FLAG_MSI_PARENT
Date: Fri, 25 Nov 2022 00:24:15 +0100 (CET)	[thread overview]
Message-ID: <20221124230313.690038274@linutronix.de> (raw)
In-Reply-To: 20221124225331.464480443@linutronix.de

The new PCI/IMS (Interrupt Message Store) functionality is allowing
hardware vendors to provide implementation specific storage for the MSI
messages. This can be device memory and also host/guest memory, e.g. in
queue memory which is shared with the hardware.

This requires device specific MSI interrupt domains, which cannot be
achieved by expanding the existing PCI/MSI interrupt domain concept which is
a global interrupt domain shared by all PCI devices on a particular (IOMMU)
segment:

                                         |--- device 1
     [Vector]---[Remapping]---[PCI/MSI]--|...
                                         |--- device N

This works because the PCI/MSI[-X] space is uniform, but falls apart with
PCI/IMS which is implementation defined and must be available along with
PCI/MSI[-X] on the same device.

To support PCI/MSI[-X] plus PCI/IMS on the same device it is required to
rework the PCI/MSI interrupt domain hierarchy concept in the following way:

                              |--- [PCI/MSI] device 1
     [Vector]---[Remapping]---|...
                              |--- [PCI/MSI] device N

That allows in the next step to create multiple interrupt domains per device:


                              |--- [PCI/MSI] device 1
                              |--- [PCI/IMS] device 1
     [Vector]---[Remapping]---|...
                              |--- [PCI/MSI] device N
                              |--- [PCI/IMS] device N

So the domain which previously created the global PCI/MSI domain must now
act as parent domain for the per device domains.

The hierarchy depth is the same as before, but the PCI/MSI domains are then
device specific and not longer global.

Provide IRQ_DOMAIN_FLAG_MSI_PARENT, which allows to identify these parent
domains, along with helpers to query it.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
---
 include/linux/irqdomain.h |   14 ++++++++++++++
 1 file changed, 14 insertions(+)
--- a/include/linux/irqdomain.h
+++ b/include/linux/irqdomain.h
@@ -189,6 +189,9 @@ enum {
 	/* Irq domain doesn't translate anything */
 	IRQ_DOMAIN_FLAG_NO_MAP		= (1 << 6),
 
+	/* Irq domain is a MSI parent domain */
+	IRQ_DOMAIN_FLAG_MSI_PARENT	= (1 << 8),
+
 	/*
 	 * Flags starting from IRQ_DOMAIN_FLAG_NONCORE are reserved
 	 * for implementation specific purposes and ignored by the
@@ -551,6 +554,11 @@ static inline bool irq_domain_is_msi_rem
 
 extern bool irq_domain_hierarchical_is_msi_remap(struct irq_domain *domain);
 
+static inline bool irq_domain_is_msi_parent(struct irq_domain *domain)
+{
+	return domain->flags & IRQ_DOMAIN_FLAG_MSI_PARENT;
+}
+
 #else	/* CONFIG_IRQ_DOMAIN_HIERARCHY */
 static inline int irq_domain_alloc_irqs(struct irq_domain *domain,
 			unsigned int nr_irqs, int node, void *arg)
@@ -596,6 +604,12 @@ irq_domain_hierarchical_is_msi_remap(str
 {
 	return false;
 }
+
+static inline bool irq_domain_is_msi_parent(struct irq_domain *domain)
+{
+	return false;
+}
+
 #endif	/* CONFIG_IRQ_DOMAIN_HIERARCHY */
 
 #else /* CONFIG_IRQ_DOMAIN */


  parent reply	other threads:[~2022-11-24 23:24 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-24 23:24 [patch V3 00/22] genirq, PCI/MSI: Support for per device MSI and PCI/IMS - Part 2 API rework Thomas Gleixner
2022-11-24 23:24 ` [patch V3 01/22] genirq/msi: Move IRQ_DOMAIN_MSI_NOMASK_QUIRK to MSI flags Thomas Gleixner
2022-11-24 23:24 ` [patch V3 02/22] genirq/irqdomain: Make struct irqdomain readable Thomas Gleixner
2022-11-24 23:24 ` [patch V3 03/22] genirq/irqdomain: Rename irq_domain::dev to irq_domain::pm_dev Thomas Gleixner
2022-11-24 23:24 ` [patch V3 04/22] genirq/msi: Create msi_api.h Thomas Gleixner
2022-11-24 23:24 ` Thomas Gleixner [this message]
2022-11-24 23:24 ` [patch V3 06/22] genirq/irqdomain: Provide IRQ_DOMAIN_FLAG_MSI_DEVICE Thomas Gleixner
2022-11-24 23:24 ` [patch V3 07/22] genirq/msi: Check for invalid MSI parent domain usage Thomas Gleixner
2022-11-24 23:24 ` [patch V3 08/22] genirq/msi: Move xarray into a separate struct and create an array Thomas Gleixner
2022-11-24 23:24 ` [patch V3 09/22] genirq/msi: Add pointers for per device irq domains Thomas Gleixner
2022-11-24 23:24 ` [patch V3 10/22] genirq/msi: Make MSI descriptor iterators device domain aware Thomas Gleixner
2022-11-24 23:24 ` [patch V3 11/22] genirq/msi: Make msi_get_virq() " Thomas Gleixner
2022-11-24 23:24 ` [patch V3 12/22] genirq/msi: Rename msi_add_msi_desc() to msi_insert_msi_desc() Thomas Gleixner
2022-11-24 23:24 ` [patch V3 13/22] genirq/msi: Make descriptor allocation device domain aware Thomas Gleixner
2022-11-24 23:24 ` [patch V3 14/22] genirq/msi: Make descriptor freeing " Thomas Gleixner
2022-11-24 23:24 ` [patch V3 15/22] genirq/msi: Make msi_add_simple_msi_descs() device " Thomas Gleixner
2022-11-24 23:24 ` [patch V3 16/22] genirq/msi: Provide new domain id based interfaces for freeing interrupts Thomas Gleixner
2023-01-16  9:56   ` David Woodhouse
2023-01-16 10:10     ` David Woodhouse
2023-01-16 16:35     ` Thomas Gleixner
2023-01-16 18:11       ` Thomas Gleixner
2023-01-16 18:58         ` David Woodhouse
2023-01-16 19:22           ` Thomas Gleixner
2023-01-16 19:28             ` David Woodhouse
2023-01-16 19:49               ` Thomas Gleixner
2023-01-17  8:22                 ` David Woodhouse
2022-11-24 23:24 ` [patch V3 17/22] genirq/msi: Provide new domain id allocation functions Thomas Gleixner
2022-11-24 23:24 ` [patch V3 18/22] PCI/MSI: Use msi_domain_alloc/free_irqs_all_locked() Thomas Gleixner
2022-11-24 23:24 ` [patch V3 19/22] platform-msi: Switch to the domain id aware MSI interfaces Thomas Gleixner
2022-11-24 23:24 ` [patch V3 20/22] bus: fsl-mc-msi: Switch to domain id aware interfaces Thomas Gleixner
2022-11-24 23:24 ` [patch V3 21/22] oc: ti: ti_sci_inta_msi: Switch to domain id aware MSI functions Thomas Gleixner
2022-11-24 23:24 ` [patch V3 22/22] genirq/msi: Remove unused alloc/free interfaces Thomas Gleixner
2022-11-28  2:33 ` [patch V3 00/22] genirq, PCI/MSI: Support for per device MSI and PCI/IMS - Part 2 API rework Tian, Kevin
2022-12-05 11:04 ` Marc Zyngier

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