From: Bjorn Helgaas <helgaas@kernel.org>
To: Dave Jiang <dave.jiang@intel.com>
Cc: linux-cxl@vger.kernel.org, linux-pci@vger.kernel.org,
dan.j.williams@intel.com, ira.weiny@intel.com,
vishal.l.verma@intel.com, alison.schofield@intel.com,
Jonathan.Cameron@huawei.com, bhelgaas@google.com
Subject: Re: [v5 11/11 PATCH] cxl/pci: Add callback to log AER correctable error
Date: Wed, 30 Nov 2022 16:47:14 -0600 [thread overview]
Message-ID: <20221130224714.GA846634@bhelgaas> (raw)
In-Reply-To: <166984638949.2804499.1293428014191809830.stgit@djiang5-desk3.ch.intel.com>
On Wed, Nov 30, 2022 at 03:13:45PM -0700, Dave Jiang wrote:
> Add AER error handler callback to read the correctable error status
> register for the CXL device. Log the error as a trace event and clear the
> error. For CXL devices, the driver also needs to write back to the AER CE
> status register to clear the unmasked CEs.
"AER CE status register" points in the wrong direction.
> See CXL spec rev3.0 8.2.4.16 for Correctable Error Status Register.
> static const struct pci_error_handlers cxl_error_handlers = {
> .error_detected = cxl_error_detected,
> .slot_reset = cxl_slot_reset,
> .resume = cxl_error_resume,
> + .cor_error_detected = cxl_correctable_error_logging,
It makes grep/cscope a little more useful when the function name
includes the struct member name, e.g., "cxl_cor_error_detected".
Bjorn
next prev parent reply other threads:[~2022-11-30 22:47 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-29 17:48 [PATCH v4 00/11] cxl/pci: Add fundamental error handling Dave Jiang
2022-11-29 17:48 ` [PATCH v4 01/11] cxl/pci: Cleanup repeated code in cxl_probe_regs() helpers Dave Jiang
2022-11-29 17:48 ` [PATCH v4 02/11] cxl/pci: Cleanup cxl_map_device_regs() Dave Jiang
2022-11-29 17:48 ` [PATCH v4 03/11] cxl/pci: Kill cxl_map_regs() Dave Jiang
2022-11-29 17:48 ` [PATCH v4 04/11] cxl/core/regs: Make cxl_map_{component, device}_regs() device generic Dave Jiang
2022-11-29 17:48 ` [PATCH v4 05/11] cxl/port: Limit the port driver to just the HDM Decoder Capability Dave Jiang
2022-11-29 17:48 ` [PATCH v4 06/11] cxl/pci: Prepare for mapping RAS Capability Structure Dave Jiang
2022-11-29 17:48 ` [PATCH v4 07/11] cxl/pci: Find and map the " Dave Jiang
2022-11-29 17:48 ` [PATCH v4 08/11] cxl/pci: add tracepoint events for CXL RAS Dave Jiang
2022-11-29 19:45 ` Steven Rostedt
2022-11-29 17:48 ` [PATCH v4 09/11] cxl/pci: Add (hopeful) error handling support Dave Jiang
2023-01-06 16:05 ` Jonathan Cameron
2023-01-06 16:12 ` Dave Jiang
2022-11-29 17:49 ` [PATCH v4 10/11] PCI/AER: Add optional logging callback for correctable error Dave Jiang
2022-11-30 19:45 ` Bjorn Helgaas
2022-11-30 21:37 ` Dave Jiang
2022-11-30 22:11 ` [v5 10/11 PATCH] " Dave Jiang
2022-11-30 22:13 ` [v5 11/11 PATCH] cxl/pci: Add callback to log AER " Dave Jiang
2022-11-30 22:47 ` Bjorn Helgaas [this message]
2022-12-01 0:02 ` [v6 " Dave Jiang
2022-12-07 20:04 ` Terry Bowman
2022-12-07 20:29 ` Bjorn Helgaas
2022-12-07 20:54 ` Terry Bowman
2022-11-29 17:49 ` [PATCH v4 11/11] " Dave Jiang
2022-12-13 15:17 ` [PATCH v4 00/11] cxl/pci: Add fundamental error handling Jonathan Cameron
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