From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Bjorn Helgaas <bhelgaas@google.com>
Cc: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>,
Lukas Wunner <lukas@wunner.de>,
Chris Chiu <chris.chiu@canonical.com>,
Alexander Motin <mav@ixsystems.com>,
Nicholas Johnson <nicholas.johnson-opensource@outlook.com.au>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
linux-pci@vger.kernel.org
Subject: [PATCH v6 1/3] PCI: Align extra resources for hotplug bridges properly
Date: Tue, 31 Jan 2023 11:24:03 +0200 [thread overview]
Message-ID: <20230131092405.29121-2-mika.westerberg@linux.intel.com> (raw)
In-Reply-To: <20230131092405.29121-1-mika.westerberg@linux.intel.com>
After division the extra resource space per hotplug bridge may not be
aligned according to the window alignment so do that before passing it
down for further distribution.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
---
drivers/pci/setup-bus.c | 25 +++++++++++++++++++------
1 file changed, 19 insertions(+), 6 deletions(-)
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index b4096598dbcb..e440f264accb 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -1891,6 +1891,7 @@ static void pci_bus_distribute_available_resources(struct pci_bus *bus,
* resource space between hotplug bridges.
*/
for_each_pci_bridge(dev, bus) {
+ struct resource *res;
struct pci_bus *b;
b = dev->subordinate;
@@ -1902,16 +1903,28 @@ static void pci_bus_distribute_available_resources(struct pci_bus *bus,
* hotplug-capable downstream ports taking alignment into
* account.
*/
- io.end = io.start + io_per_hp - 1;
- mmio.end = mmio.start + mmio_per_hp - 1;
- mmio_pref.end = mmio_pref.start + mmio_pref_per_hp - 1;
+ res = &dev->resource[PCI_BRIDGE_IO_WINDOW];
+ align = pci_resource_alignment(dev, res);
+ io.end = align ? io.start + ALIGN_DOWN(io_per_hp, align) - 1
+ : io.start + io_per_hp - 1;
+
+ res = &dev->resource[PCI_BRIDGE_MEM_WINDOW];
+ align = pci_resource_alignment(dev, res);
+ mmio.end = align ? mmio.start + ALIGN_DOWN(mmio_per_hp, align) - 1
+ : mmio.start + mmio_per_hp - 1;
+
+ res = &dev->resource[PCI_BRIDGE_PREF_MEM_WINDOW];
+ align = pci_resource_alignment(dev, res);
+ mmio_pref.end = align ? mmio_pref.start +
+ ALIGN_DOWN(mmio_pref_per_hp, align) - 1
+ : mmio_pref.start + mmio_pref_per_hp - 1;
pci_bus_distribute_available_resources(b, add_list, io, mmio,
mmio_pref);
- io.start += io_per_hp;
- mmio.start += mmio_per_hp;
- mmio_pref.start += mmio_pref_per_hp;
+ io.start += io.end + 1;
+ mmio.start += mmio.end + 1;
+ mmio_pref.start += mmio_pref.end + 1;
}
}
--
2.39.0
next prev parent reply other threads:[~2023-01-31 9:23 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-31 9:24 [PATCH v6 0/3] PCI: distribute resources for root buses Mika Westerberg
2023-01-31 9:24 ` Mika Westerberg [this message]
2023-01-31 9:24 ` [PATCH v6 2/3] PCI: Take other bus devices into account when distributing resources Mika Westerberg
2023-01-31 9:24 ` [PATCH v6 3/3] PCI: Distribute available resources for root buses too Mika Westerberg
2023-02-07 17:47 ` [PATCH v6 0/3] PCI: distribute resources for root buses Bjorn Helgaas
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