From: Bjorn Helgaas <helgaas@kernel.org>
To: Elad Nachman <enachman@marvell.com>
Cc: thomas.petazzoni@bootlin.com, bhelgaas@google.com,
lpieralisi@kernel.org, robh@kernel.org, kw@linux.com,
krzysztof.kozlowski+dt@linaro.org, linux-pci@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 0/7] PCI: dwc: Add support for Marvell AC5 SoC
Date: Thu, 23 Feb 2023 13:42:30 -0600 [thread overview]
Message-ID: <20230223194230.GA3888258@bhelgaas> (raw)
In-Reply-To: <20230223180531.15148-1-enachman@marvell.com>
On Thu, Feb 23, 2023 at 08:05:24PM +0200, Elad Nachman wrote:
> From: Elad Nachman <enachman@marvell.com>
>
> Add support for AC5 SoC with MSI and in message emulated legacy mode.
> There are differences in the registers addresses, blocks, DDR location
> for coherent DMA allocation and additional implementation specific registers.
> In addition, support cases of older Designware IP (Armada 7020) which supports
> above 4GB PCIe physical memory window by use of device tree.
> ...
> Elad Nachman (4):
> dt-bindings: PCI: dwc: add DMA, region mask bits
> PCI: dwc: support AC5 Legacy PCIe interrupts
> PCI: dwc: Introduce Configurable DMA mask
> PCI: dwc: Introduce region limit from DT
>
> Raz Adashi (1):
> PCI: armada8k: Add AC5 SoC support
>
> Vadym Kochan (1):
> dt-bindings: PCI: armada8k: Add compatible string for AC5 SoC
>
> Yuval Shaia (1):
> PCI: armada8k: Add MSI support for AC5 SoC
Capitalize subject consistently. Use consistent driver tags. Use
parallel sentence structure.
s/add DMA/Add DMA/
s/PCI: dwc: support/PCI: armada8k: Support/
(this particular patch only affects armada8k, so don't label it "dwc")
s/support/Support/
s/Configurable/configurable/
s/Add MSI support for AC5 SoC/Add AC5 MSI support/
(parallel to "Add AC5 SoC support")
The PCIe spec doesn't really use "legacy" when defining the interrupt
model. I think you're referring to INTx, which it *does* use and is
more specific. If so, please say "INTx interrupts" instead of "legacy
PCIe interrupts".
prev parent reply other threads:[~2023-02-23 19:42 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-23 18:05 [PATCH v3 0/7] PCI: dwc: Add support for Marvell AC5 SoC Elad Nachman
2023-02-23 18:05 ` [PATCH v3 1/7] dt-bindings: PCI: armada8k: Add compatible string for " Elad Nachman
2023-02-23 18:05 ` [PATCH v3 2/7] PCI: armada8k: Add AC5 SoC support Elad Nachman
2023-02-23 18:05 ` [PATCH v3 3/7] PCI: armada8k: Add MSI support for AC5 SoC Elad Nachman
2023-02-23 18:05 ` [PATCH v3 4/7] dt-bindings: PCI: dwc: add DMA, region mask bits Elad Nachman
2023-02-23 18:12 ` Krzysztof Kozlowski
2023-02-27 18:55 ` Rob Herring
2023-02-23 18:05 ` [PATCH v3 5/7] PCI: dwc: support AC5 Legacy PCIe interrupts Elad Nachman
2023-02-23 19:48 ` Bjorn Helgaas
2023-02-23 18:05 ` [PATCH v3 6/7] PCI: dwc: Introduce Configurable DMA mask Elad Nachman
2023-02-23 18:14 ` Krzysztof Kozlowski
2023-02-23 18:05 ` [PATCH v3 7/7] PCI: dwc: Introduce region limit from DT Elad Nachman
2023-02-23 18:16 ` Krzysztof Kozlowski
2023-02-23 19:42 ` Bjorn Helgaas [this message]
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