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[162.198.119.188]) by smtp.gmail.com with ESMTPSA id x18-20020ac87012000000b003ef3df76ec7sm2035108qtm.93.2023.05.07.00.36.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 07 May 2023 00:36:04 -0700 (PDT) From: Mike Pastore To: linux-pci@vger.kernel.org Cc: Mike Pastore Subject: [PATCH] PCI: Apply Intel NVMe quirk to Solidigm P44 Pro Date: Sun, 7 May 2023 02:35:19 -0500 Message-Id: <20230507073519.9737-1-mike@oobak.org> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Prevent KVM hang when a Solidgm P44 Pro NVMe is passed through to a guest via IOMMU and the guest is subsequently rebooted. A similar issue was identified and patched in commit 51ba09452d11b ("PCI: Delay after FLR of Intel DC P3700 NVMe") and the same fix can be aplied for this case. (Intel spun off their NAND and SSD business as Solidigm and sold it to SK Hynix in late 2021.) Signed-off-by: Mike Pastore --- drivers/pci/quirks.c | 10 ++++++---- include/linux/pci_ids.h | 2 ++ 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 44cab813bf95..b47844d0e574 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -3980,10 +3980,11 @@ static int nvme_disable_and_flr(struct pci_dev *dev, bool probe) } /* - * Intel DC P3700 NVMe controller will timeout waiting for ready status - * to change after NVMe enable if the driver starts interacting with the - * device too soon after FLR. A 250ms delay after FLR has heuristically - * proven to produce reliably working results for device assignment cases. + * Some NVMe controllers such as Intel DC P3700 and Solidigm P44 Pro will + * timeout waiting for ready status to change after NVMe enable if the driver + * starts interacting with the device too soon after FLR. A 250ms delay after + * FLR has heuristically proven to produce reliably working results for device + * assignment cases. */ static int delay_250ms_after_flr(struct pci_dev *dev, bool probe) { @@ -4070,6 +4071,7 @@ static const struct pci_dev_reset_methods pci_dev_reset_methods[] = { { PCI_VENDOR_ID_SAMSUNG, 0xa804, nvme_disable_and_flr }, { PCI_VENDOR_ID_INTEL, 0x0953, delay_250ms_after_flr }, { PCI_VENDOR_ID_INTEL, 0x0a54, delay_250ms_after_flr }, + { PCI_VENDOR_ID_SOLIDIGM, 0xf1ac, delay_250ms_after_flr }, { PCI_VENDOR_ID_CHELSIO, PCI_ANY_ID, reset_chelsio_generic_dev }, { PCI_VENDOR_ID_HUAWEI, PCI_DEVICE_ID_HINIC_VF, diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 45c3d62e616d..6105eddf41bf 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -3119,4 +3119,6 @@ #define PCI_VENDOR_ID_NCUBE 0x10ff +#define PCI_VENDOR_ID_SOLIDIGM 0x025e + #endif /* _LINUX_PCI_IDS_H */ base-commit: 63355b9884b3d1677de6bd1517cd2b8a9bf53978 -- 2.39.2