From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 83D92C77B7D for ; Sat, 20 May 2023 05:09:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229991AbjETFJF (ORCPT ); Sat, 20 May 2023 01:09:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60420 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229508AbjETFJE (ORCPT ); Sat, 20 May 2023 01:09:04 -0400 Received: from out-38.mta0.migadu.com (out-38.mta0.migadu.com [IPv6:2001:41d0:1004:224b::26]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 47B94E3 for ; Fri, 19 May 2023 22:09:02 -0700 (PDT) X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1684559340; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=ThFXexQPFRCJNnuExBQV6oXvorIqggOn4AoGvAjt/7s=; b=duD7MC4Zg8G1UODvoQmB0BeiAUk3aAyCL/Zcr0g9IklFq0JY2LyL7rVp2tk88HFXA22f2L EGIS25ZanxwiKfWIYVScBIWjEj3aB+up8WupWIExitpPvJul0BveLCI5Etj6nkqClSQAGx lA7lb05aLpDm+wEj5dS/6FSfSPqewv0= From: Cai Huoqing To: vkoul@kernel.org Cc: Cai Huoqing , Serge Semin , Manivannan Sadhasivam , Gustavo Pimentel , Jingoo Han , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH v11 0/4] dmaengine: dw-edma: Add support for native HDMA Date: Sat, 20 May 2023 13:08:48 +0800 Message-Id: <20230520050854.73160-1-cai.huoqing@linux.dev> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Migadu-Flow: FLOW_OUT Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add support for HDMA NATIVE, as long the IP design has set the compatible register map parameter-HDMA_NATIVE, which allows compatibility for native HDMA register configuration. The HDMA Hyper-DMA IP is an enhancement of the eDMA embedded-DMA IP. And the native HDMA registers are different from eDMA, so this patch add support for HDMA NATIVE mode. HDMA write and read channels operate independently to maximize the performance of the HDMA read and write data transfer over the link When you configure the HDMA with multiple read channels, then it uses a round robin (RR) arbitration scheme to select the next read channel to be serviced.The same applies when youhave multiple write channels. The native HDMA driver also supports a maximum of 16 independent channels (8 write + 8 read), which can run simultaneously. Both SAR (Source Address Register) and DAR (Destination Address Register) are aligned to byte. Cai Huoqing (4): dmaengine: dw-edma: Rename dw_edma_core_ops structure to dw_edma_plat_ops dmaengine: dw-edma: Create a new dw_edma_core_ops structure to abstract controller operation dmaengine: dw-edma: Add support for native HDMA dmaengine: dw-edma: Add HDMA DebugFS support Tested-by: Serge Semin v10->v11: Using single name in commit log. v10 link: https://lore.kernel.org/lkml/20230517030115.21093-1-cai.huoqing@linux.dev/ drivers/dma/dw-edma/Makefile | 8 +- drivers/dma/dw-edma/dw-edma-core.c | 86 ++---- drivers/dma/dw-edma/dw-edma-core.h | 58 ++++ drivers/dma/dw-edma/dw-edma-pcie.c | 4 +- drivers/dma/dw-edma/dw-edma-v0-core.c | 85 +++++- drivers/dma/dw-edma/dw-edma-v0-core.h | 14 +- drivers/dma/dw-edma/dw-hdma-v0-core.c | 296 +++++++++++++++++++ drivers/dma/dw-edma/dw-hdma-v0-core.h | 17 ++ drivers/dma/dw-edma/dw-hdma-v0-debugfs.c | 170 +++++++++++ drivers/dma/dw-edma/dw-hdma-v0-debugfs.h | 22 ++ drivers/dma/dw-edma/dw-hdma-v0-regs.h | 129 ++++++++ drivers/pci/controller/dwc/pcie-designware.c | 2 +- include/linux/dma/edma.h | 7 +- 13 files changed, 807 insertions(+), 91 deletions(-) create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-core.c create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-core.h create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-debugfs.c create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-debugfs.h create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-regs.h -- 2.34.1