From: Yong-Xuan Wang <yongxuan.wang@sifive.com>
To: linux-pci@vger.kernel.org
Cc: paul.walmsley@sifive.com, greentime.hu@sifive.com,
lpieralisi@kernel.org, kw@linux.com, robh@kernel.org,
bhelgaas@google.com, p.zabel@pengutronix.de, palmer@dabbelt.com,
fancer.lancer@gmail.com, zong.li@sifive.com,
Yong-Xuan Wang <yongxuan.wang@sifive.com>
Subject: [PATCH v2] PCI: fu740: Set the number of MSI vectors
Date: Mon, 31 Jul 2023 03:06:26 +0000 [thread overview]
Message-ID: <20230731030626.13283-1-yongxuan.wang@sifive.com> (raw)
The iMSI-RX module of DW PCIe controller provide sets of MSI_CTRL_INT_i_*
registers, and each set can handle 32 MSI interrupts. However, since we
didn't specify the total number of supported interrupts for the fu740 PCIe
controller, the driver previously only enable 1 set of MSI_CTRL_INT_i_*
registers.
This patch sets the supported number of MSI vectors to enables all the
MSI_CTRL_INT_i_* registers on the fu740 PCIe core.
Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
---
Changelog
v2:
- recast the subject and the commit message
---
drivers/pci/controller/dwc/pcie-fu740.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pci/controller/dwc/pcie-fu740.c b/drivers/pci/controller/dwc/pcie-fu740.c
index 0c90583c078b..1e9b44b8bba4 100644
--- a/drivers/pci/controller/dwc/pcie-fu740.c
+++ b/drivers/pci/controller/dwc/pcie-fu740.c
@@ -299,6 +299,7 @@ static int fu740_pcie_probe(struct platform_device *pdev)
pci->dev = dev;
pci->ops = &dw_pcie_ops;
pci->pp.ops = &fu740_pcie_host_ops;
+ pci->pp.num_vectors = MAX_MSI_IRQS;
/* SiFive specific region: mgmt */
afp->mgmt_base = devm_platform_ioremap_resource_byname(pdev, "mgmt");
--
2.17.1
next reply other threads:[~2023-07-31 3:06 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-31 3:06 Yong-Xuan Wang [this message]
2023-07-31 17:06 ` [PATCH v2] PCI: fu740: Set the number of MSI vectors Bjorn Helgaas
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