linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Bjorn Helgaas <helgaas@kernel.org>
To: Yong-Xuan Wang <yongxuan.wang@sifive.com>
Cc: linux-pci@vger.kernel.org, paul.walmsley@sifive.com,
	greentime.hu@sifive.com, lpieralisi@kernel.org, kw@linux.com,
	robh@kernel.org, bhelgaas@google.com, p.zabel@pengutronix.de,
	palmer@dabbelt.com, fancer.lancer@gmail.com, zong.li@sifive.com
Subject: Re: [PATCH v2] PCI: fu740: Set the number of MSI vectors
Date: Mon, 31 Jul 2023 12:06:05 -0500	[thread overview]
Message-ID: <20230731170605.GA14538@bhelgaas> (raw)
In-Reply-To: <20230731030626.13283-1-yongxuan.wang@sifive.com>

On Mon, Jul 31, 2023 at 03:06:26AM +0000, Yong-Xuan Wang wrote:
> The iMSI-RX module of DW PCIe controller provide sets of MSI_CTRL_INT_i_*
> registers, and each set can handle 32 MSI interrupts. However, since we
> didn't specify the total number of supported interrupts for the fu740 PCIe
> controller, the driver previously only enable 1 set of MSI_CTRL_INT_i_*
> registers.
> This patch sets the supported number of MSI vectors to enables all the
> MSI_CTRL_INT_i_* registers on the fu740 PCIe core.

s/controller provide sets/controller provides sets/
/only enable/only/enabled/
s/to enables all the/to enable all the/

Separate pargraphs with blank lines.

Write in imperative mood, i.e.,

  Set the supported number of MSI vectors to enable all the ...

> Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com>
> Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
> ---
> Changelog
> v2:
> - recast the subject and the commit message
> ---
>  drivers/pci/controller/dwc/pcie-fu740.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-fu740.c b/drivers/pci/controller/dwc/pcie-fu740.c
> index 0c90583c078b..1e9b44b8bba4 100644
> --- a/drivers/pci/controller/dwc/pcie-fu740.c
> +++ b/drivers/pci/controller/dwc/pcie-fu740.c
> @@ -299,6 +299,7 @@ static int fu740_pcie_probe(struct platform_device *pdev)
>  	pci->dev = dev;
>  	pci->ops = &dw_pcie_ops;
>  	pci->pp.ops = &fu740_pcie_host_ops;
> +	pci->pp.num_vectors = MAX_MSI_IRQS;
>  	/* SiFive specific region: mgmt */
>  	afp->mgmt_base = devm_platform_ioremap_resource_byname(pdev, "mgmt");
> -- 
> 2.17.1
> 

      reply	other threads:[~2023-07-31 17:10 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-31  3:06 [PATCH v2] PCI: fu740: Set the number of MSI vectors Yong-Xuan Wang
2023-07-31 17:06 ` Bjorn Helgaas [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230731170605.GA14538@bhelgaas \
    --to=helgaas@kernel.org \
    --cc=bhelgaas@google.com \
    --cc=fancer.lancer@gmail.com \
    --cc=greentime.hu@sifive.com \
    --cc=kw@linux.com \
    --cc=linux-pci@vger.kernel.org \
    --cc=lpieralisi@kernel.org \
    --cc=p.zabel@pengutronix.de \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    --cc=robh@kernel.org \
    --cc=yongxuan.wang@sifive.com \
    --cc=zong.li@sifive.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).