* [PATCH v2] PCI: fu740: Set the number of MSI vectors
@ 2023-07-31 3:06 Yong-Xuan Wang
2023-07-31 17:06 ` Bjorn Helgaas
0 siblings, 1 reply; 2+ messages in thread
From: Yong-Xuan Wang @ 2023-07-31 3:06 UTC (permalink / raw)
To: linux-pci
Cc: paul.walmsley, greentime.hu, lpieralisi, kw, robh, bhelgaas,
p.zabel, palmer, fancer.lancer, zong.li, Yong-Xuan Wang
The iMSI-RX module of DW PCIe controller provide sets of MSI_CTRL_INT_i_*
registers, and each set can handle 32 MSI interrupts. However, since we
didn't specify the total number of supported interrupts for the fu740 PCIe
controller, the driver previously only enable 1 set of MSI_CTRL_INT_i_*
registers.
This patch sets the supported number of MSI vectors to enables all the
MSI_CTRL_INT_i_* registers on the fu740 PCIe core.
Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
---
Changelog
v2:
- recast the subject and the commit message
---
drivers/pci/controller/dwc/pcie-fu740.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pci/controller/dwc/pcie-fu740.c b/drivers/pci/controller/dwc/pcie-fu740.c
index 0c90583c078b..1e9b44b8bba4 100644
--- a/drivers/pci/controller/dwc/pcie-fu740.c
+++ b/drivers/pci/controller/dwc/pcie-fu740.c
@@ -299,6 +299,7 @@ static int fu740_pcie_probe(struct platform_device *pdev)
pci->dev = dev;
pci->ops = &dw_pcie_ops;
pci->pp.ops = &fu740_pcie_host_ops;
+ pci->pp.num_vectors = MAX_MSI_IRQS;
/* SiFive specific region: mgmt */
afp->mgmt_base = devm_platform_ioremap_resource_byname(pdev, "mgmt");
--
2.17.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH v2] PCI: fu740: Set the number of MSI vectors
2023-07-31 3:06 [PATCH v2] PCI: fu740: Set the number of MSI vectors Yong-Xuan Wang
@ 2023-07-31 17:06 ` Bjorn Helgaas
0 siblings, 0 replies; 2+ messages in thread
From: Bjorn Helgaas @ 2023-07-31 17:06 UTC (permalink / raw)
To: Yong-Xuan Wang
Cc: linux-pci, paul.walmsley, greentime.hu, lpieralisi, kw, robh,
bhelgaas, p.zabel, palmer, fancer.lancer, zong.li
On Mon, Jul 31, 2023 at 03:06:26AM +0000, Yong-Xuan Wang wrote:
> The iMSI-RX module of DW PCIe controller provide sets of MSI_CTRL_INT_i_*
> registers, and each set can handle 32 MSI interrupts. However, since we
> didn't specify the total number of supported interrupts for the fu740 PCIe
> controller, the driver previously only enable 1 set of MSI_CTRL_INT_i_*
> registers.
> This patch sets the supported number of MSI vectors to enables all the
> MSI_CTRL_INT_i_* registers on the fu740 PCIe core.
s/controller provide sets/controller provides sets/
/only enable/only/enabled/
s/to enables all the/to enable all the/
Separate pargraphs with blank lines.
Write in imperative mood, i.e.,
Set the supported number of MSI vectors to enable all the ...
> Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com>
> Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
> ---
> Changelog
> v2:
> - recast the subject and the commit message
> ---
> drivers/pci/controller/dwc/pcie-fu740.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/pci/controller/dwc/pcie-fu740.c b/drivers/pci/controller/dwc/pcie-fu740.c
> index 0c90583c078b..1e9b44b8bba4 100644
> --- a/drivers/pci/controller/dwc/pcie-fu740.c
> +++ b/drivers/pci/controller/dwc/pcie-fu740.c
> @@ -299,6 +299,7 @@ static int fu740_pcie_probe(struct platform_device *pdev)
> pci->dev = dev;
> pci->ops = &dw_pcie_ops;
> pci->pp.ops = &fu740_pcie_host_ops;
> + pci->pp.num_vectors = MAX_MSI_IRQS;
> /* SiFive specific region: mgmt */
> afp->mgmt_base = devm_platform_ioremap_resource_byname(pdev, "mgmt");
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 2+ messages in thread
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