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From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Cc: <linux-pci@vger.kernel.org>, Bjorn Helgaas <helgaas@kernel.org>,
	"Jesse Brandeburg" <jesse.brandeburg@intel.com>,
	Tony Nguyen <anthony.l.nguyen@intel.com>,
	"David S. Miller" <davem@davemloft.net>,
	"Eric Dumazet" <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>,
	"Paolo Abeni" <pabeni@redhat.com>,
	<intel-wired-lan@lists.osuosl.org>, <netdev@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 3/8] igb: Use FIELD_GET() to extract Link Width
Date: Tue, 12 Sep 2023 11:34:03 +0100	[thread overview]
Message-ID: <20230912113403.00006c39@Huawei.com> (raw)
In-Reply-To: <20230911121501.21910-4-ilpo.jarvinen@linux.intel.com>

On Mon, 11 Sep 2023 15:14:56 +0300
Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> wrote:

> Use FIELD_GET() to extract PCIe Negotiated Link Width field instead of
> custom masking and shifting.
> 
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
> ---
>  drivers/net/ethernet/intel/igb/e1000_mac.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/net/ethernet/intel/igb/e1000_mac.c b/drivers/net/ethernet/intel/igb/e1000_mac.c
> index caf91c6f52b4..5a23b9cfec6c 100644
> --- a/drivers/net/ethernet/intel/igb/e1000_mac.c
> +++ b/drivers/net/ethernet/intel/igb/e1000_mac.c
> @@ -1,6 +1,7 @@
>  // SPDX-License-Identifier: GPL-2.0
>  /* Copyright(c) 2007 - 2018 Intel Corporation. */
>  
> +#include <linux/bitfield.h>
>  #include <linux/if_ether.h>
>  #include <linux/delay.h>
>  #include <linux/pci.h>
> @@ -50,9 +51,8 @@ s32 igb_get_bus_info_pcie(struct e1000_hw *hw)
>  			break;
>  		}
>  
> -		bus->width = (enum e1000_bus_width)((pcie_link_status &
> -						     PCI_EXP_LNKSTA_NLW) >>
> -						     PCI_EXP_LNKSTA_NLW_SHIFT);
> +		bus->width = (enum e1000_bus_width)FIELD_GET(PCI_EXP_LNKSTA_NLW,
> +							     pcie_link_status);

This cast is a bit ugly given it takes the values 0, 1, 2, 3 and
we extra a field that the spec says contains 1, 2, 4, 8 etc
Hence it only works because only 1 and 2 are used I think...  Not nice.


Also, whilst looking at this I note that e1000e has it's own defines
for PCIE_LINK_WIDTH_MASK and PCIE_LINK_WIDTH_SHIFT 

Looks like those should be changed to use the standard defines.

For extra giggles there are two e1000_bus_width enum definitions in different
headers.

Actual patch is good - just 'interesting' stuff noticed whilst looking at it :)

Jonathan


>  	}
>  
>  	reg = rd32(E1000_STATUS);


  reply	other threads:[~2023-09-12 10:44 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-11 12:14 [PATCH 0/8] PCI/treewide: PCIe Link Width field access cleanup Ilpo Järvinen
2023-09-11 12:14 ` [PATCH 1/8] IB/hfi1: Use FIELD_GET() to extract Link Width Ilpo Järvinen
2023-09-12 10:26   ` Jonathan Cameron
2023-09-11 12:14 ` [PATCH 2/8] media: cobalt: " Ilpo Järvinen
2023-09-11 12:14 ` [PATCH 3/8] igb: " Ilpo Järvinen
2023-09-12 10:34   ` Jonathan Cameron [this message]
2023-09-12 12:11     ` Ilpo Järvinen
2023-09-11 12:14 ` [PATCH 4/8] PCI: tegra194: Use FIELD_GET()/FIELD_PREP() with Link Width fields Ilpo Järvinen
2023-09-12 10:35   ` Jonathan Cameron
2023-09-11 12:14 ` [PATCH 5/8] PCI: mvebu: Use FIELD_PREP() with Link Width Ilpo Järvinen
2023-09-11 12:14 ` [PATCH 6/8] PCI: Use FIELD_GET() to extract " Ilpo Järvinen
2023-09-11 12:15 ` [PATCH 7/8] scsi: esas2r: " Ilpo Järvinen
2023-09-12 10:38   ` Jonathan Cameron
2023-09-11 12:15 ` [PATCH 8/8] scsi: qla2xxx: " Ilpo Järvinen
2023-09-12 10:39   ` Jonathan Cameron
2023-09-12 10:24 ` [PATCH 0/8] PCI/treewide: PCIe Link Width field access cleanup Jonathan Cameron

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