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Date:   Tue, 3 Oct 2023 12:09:30 -0500
From:   Bjorn Helgaas <helgaas@kernel.org>
To:     Mario Limonciello <mario.limonciello@amd.com>
Cc:     Bjorn Helgaas <bhelgaas@google.com>,
        "Rafael J . Wysocki" <rjw@rjwysocki.net>,
        Mika Westerberg <mika.westerberg@linux.intel.com>,
        Hans de Goede <hdegoede@redhat.com>,
        iain@orangesquash.org.uk,
        Shyam Sundar S K <Shyam-sundar.S-k@amd.com>,
        "open list:PCI SUBSYSTEM" <linux-pci@vger.kernel.org>,
        Ilpo =?utf-8?B?SsOkcnZpbmVu?= <ilpo.jarvinen@linux.intel.com>,
        Lukas Wunner <lukas@wunner.de>
Subject: Re: [PATCH v20 2/2] PCI: Add a quirk for AMD PCIe root ports w/ USB4
 controllers
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On Fri, Sep 29, 2023 at 09:05:55PM -0500, Mario Limonciello wrote:
> On 9/29/2023 14:44, Bjorn Helgaas wrote:
> ...

> > This is a lot of hassle to look for USB4 devices below the Root Port.
> > You said earlier that these Root Ports *only* connect to xHCI and
> > USB4 [1].
> 
> That's correct, but the part that I believe you're missing is that there are
> multiple "instances" of this PCI device ID on a failing system.
> 
> On an OEM Phoenix laptop in front of me I see 3 instances of 1022:14eb:
> 00:08.1, 00:08.2, and 00:08.3.
> 
> > If that's the case, why even bother with the search?
> > Why not just clear PCI_PM_CAP_PME_D3hot and PCI_PM_CAP_PME_D3cold
> > unconditionally, e.g., the possible patch below?
> 
> Only the one with the USB4 controller (in this system it's at 00:08.3) has
> the problem.
> 
> So I believe the proposal you have below will apply the policy to too many
> ports.

Ah, thanks for clearing that up; I've been laboring under that
misapprehension for a long time.

Bjorn