[PATCH 0/3] x86/apic: Misc pruning

[PATCH 0/3] x86/apic: Misc pruning

[Andrew Cooper]

Seriously, this work started out trying to fix a buggy comment.  It
escalated somewhat...  Perform some simple tidying.

P.S. I'm trialing `b4 prep` to send this series.  I've got some notes
already; others welcome too.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
Andrew Cooper (3):
      x86/apic: Drop apic::delivery_mode
      x86/apic: Drop enum apic_delivery_modes
      x86/apic: Drop struct local_apic

 arch/x86/include/asm/apic.h           |   2 -
 arch/x86/include/asm/apicdef.h        | 276 +---------------------------------
 arch/x86/kernel/apic/apic_flat_64.c   |   2 -
 arch/x86/kernel/apic/apic_noop.c      |   1 -
 arch/x86/kernel/apic/apic_numachip.c  |   2 -
 arch/x86/kernel/apic/bigsmp_32.c      |   1 -
 arch/x86/kernel/apic/probe_32.c       |   1 -
 arch/x86/kernel/apic/x2apic_cluster.c |   1 -
 arch/x86/kernel/apic/x2apic_phys.c    |   1 -
 arch/x86/kernel/apic/x2apic_uv_x.c    |   1 -
 arch/x86/platform/uv/uv_irq.c         |   2 +-
 drivers/pci/controller/pci-hyperv.c   |   7 -
 12 files changed, 8 insertions(+), 289 deletions(-)
---
base-commit: b56ebe7c896dc78b5865ec2c4b1dae3c93537517
change-id: 20231102-x86-apic-88dc3eae3032

Best regards,
-- 
Andrew Cooper <andrew.cooper3@citrix.com>

[PATCH 1/3] x86/apic: Drop apic::delivery_mode

[Andrew Cooper]

This field is set to APIC_DELIVERY_MODE_FIXED in all cases, and is read
exactly once.  Fold the constant in uv_program_mmr() and drop the field.

Searching for the origin of the stale HyperV comment reveals commit
a31e58e129f7 ("x86/apic: Switch all APICs to Fixed delivery mode") which
notes:

  As a consequence of this change, the apic::irq_delivery_mode field is
  now pointless, but this needs to be cleaned up in a separate patch.

6 years is long enough for this technical debt to have survived.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
 arch/x86/include/asm/apic.h           | 2 --
 arch/x86/kernel/apic/apic_flat_64.c   | 2 --
 arch/x86/kernel/apic/apic_noop.c      | 1 -
 arch/x86/kernel/apic/apic_numachip.c  | 2 --
 arch/x86/kernel/apic/bigsmp_32.c      | 1 -
 arch/x86/kernel/apic/probe_32.c       | 1 -
 arch/x86/kernel/apic/x2apic_cluster.c | 1 -
 arch/x86/kernel/apic/x2apic_phys.c    | 1 -
 arch/x86/kernel/apic/x2apic_uv_x.c    | 1 -
 arch/x86/platform/uv/uv_irq.c         | 2 +-
 drivers/pci/controller/pci-hyperv.c   | 7 -------
 11 files changed, 1 insertion(+), 20 deletions(-)

diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 5af4ec1a0f71..841afbd7bfe7 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -272,8 +272,6 @@ struct apic {
 	void	(*send_IPI_all)(int vector);
 	void	(*send_IPI_self)(int vector);
 
-	enum apic_delivery_modes delivery_mode;
-
 	u32	disable_esr		: 1,
 		dest_mode_logical	: 1,
 		x2apic_set_max_apicid	: 1;
diff --git a/arch/x86/kernel/apic/apic_flat_64.c b/arch/x86/kernel/apic/apic_flat_64.c
index 032a84e2c3cc..e526b226910b 100644
--- a/arch/x86/kernel/apic/apic_flat_64.c
+++ b/arch/x86/kernel/apic/apic_flat_64.c
@@ -82,7 +82,6 @@ static struct apic apic_flat __ro_after_init = {
 	.acpi_madt_oem_check		= flat_acpi_madt_oem_check,
 	.apic_id_registered		= default_apic_id_registered,
 
-	.delivery_mode			= APIC_DELIVERY_MODE_FIXED,
 	.dest_mode_logical		= true,
 
 	.disable_esr			= 0,
@@ -153,7 +152,6 @@ static struct apic apic_physflat __ro_after_init = {
 	.acpi_madt_oem_check		= physflat_acpi_madt_oem_check,
 	.apic_id_registered		= default_apic_id_registered,
 
-	.delivery_mode			= APIC_DELIVERY_MODE_FIXED,
 	.dest_mode_logical		= false,
 
 	.disable_esr			= 0,
diff --git a/arch/x86/kernel/apic/apic_noop.c b/arch/x86/kernel/apic/apic_noop.c
index 966d7cf10b95..70e7dfc3cc84 100644
--- a/arch/x86/kernel/apic/apic_noop.c
+++ b/arch/x86/kernel/apic/apic_noop.c
@@ -45,7 +45,6 @@ static void noop_apic_write(u32 reg, u32 val)
 struct apic apic_noop __ro_after_init = {
 	.name				= "noop",
 
-	.delivery_mode			= APIC_DELIVERY_MODE_FIXED,
 	.dest_mode_logical		= true,
 
 	.disable_esr			= 0,
diff --git a/arch/x86/kernel/apic/apic_numachip.c b/arch/x86/kernel/apic/apic_numachip.c
index 63f3d7be9dc7..8f5a42ad1f9f 100644
--- a/arch/x86/kernel/apic/apic_numachip.c
+++ b/arch/x86/kernel/apic/apic_numachip.c
@@ -222,7 +222,6 @@ static const struct apic apic_numachip1 __refconst = {
 	.probe				= numachip1_probe,
 	.acpi_madt_oem_check		= numachip1_acpi_madt_oem_check,
 
-	.delivery_mode			= APIC_DELIVERY_MODE_FIXED,
 	.dest_mode_logical		= false,
 
 	.disable_esr			= 0,
@@ -259,7 +258,6 @@ static const struct apic apic_numachip2 __refconst = {
 	.probe				= numachip2_probe,
 	.acpi_madt_oem_check		= numachip2_acpi_madt_oem_check,
 
-	.delivery_mode			= APIC_DELIVERY_MODE_FIXED,
 	.dest_mode_logical		= false,
 
 	.disable_esr			= 0,
diff --git a/arch/x86/kernel/apic/bigsmp_32.c b/arch/x86/kernel/apic/bigsmp_32.c
index 0e5535add4b5..863c3002a574 100644
--- a/arch/x86/kernel/apic/bigsmp_32.c
+++ b/arch/x86/kernel/apic/bigsmp_32.c
@@ -80,7 +80,6 @@ static struct apic apic_bigsmp __ro_after_init = {
 	.name				= "bigsmp",
 	.probe				= probe_bigsmp,
 
-	.delivery_mode			= APIC_DELIVERY_MODE_FIXED,
 	.dest_mode_logical		= false,
 
 	.disable_esr			= 1,
diff --git a/arch/x86/kernel/apic/probe_32.c b/arch/x86/kernel/apic/probe_32.c
index 9a06df6cdd68..f851ccf1e14f 100644
--- a/arch/x86/kernel/apic/probe_32.c
+++ b/arch/x86/kernel/apic/probe_32.c
@@ -35,7 +35,6 @@ static struct apic apic_default __ro_after_init = {
 	.probe				= probe_default,
 	.apic_id_registered		= default_apic_id_registered,
 
-	.delivery_mode			= APIC_DELIVERY_MODE_FIXED,
 	.dest_mode_logical		= true,
 
 	.disable_esr			= 0,
diff --git a/arch/x86/kernel/apic/x2apic_cluster.c b/arch/x86/kernel/apic/x2apic_cluster.c
index affbff65e497..7d15f6c3b718 100644
--- a/arch/x86/kernel/apic/x2apic_cluster.c
+++ b/arch/x86/kernel/apic/x2apic_cluster.c
@@ -227,7 +227,6 @@ static struct apic apic_x2apic_cluster __ro_after_init = {
 	.probe				= x2apic_cluster_probe,
 	.acpi_madt_oem_check		= x2apic_acpi_madt_oem_check,
 
-	.delivery_mode			= APIC_DELIVERY_MODE_FIXED,
 	.dest_mode_logical		= true,
 
 	.disable_esr			= 0,
diff --git a/arch/x86/kernel/apic/x2apic_phys.c b/arch/x86/kernel/apic/x2apic_phys.c
index 788cdb4ee394..8bb740e22b7d 100644
--- a/arch/x86/kernel/apic/x2apic_phys.c
+++ b/arch/x86/kernel/apic/x2apic_phys.c
@@ -145,7 +145,6 @@ static struct apic apic_x2apic_phys __ro_after_init = {
 	.probe				= x2apic_phys_probe,
 	.acpi_madt_oem_check		= x2apic_acpi_madt_oem_check,
 
-	.delivery_mode			= APIC_DELIVERY_MODE_FIXED,
 	.dest_mode_logical		= false,
 
 	.disable_esr			= 0,
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index 7d304ef1a7f5..ae4f0c1a7b43 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -805,7 +805,6 @@ static struct apic apic_x2apic_uv_x __ro_after_init = {
 	.probe				= uv_probe,
 	.acpi_madt_oem_check		= uv_acpi_madt_oem_check,
 
-	.delivery_mode			= APIC_DELIVERY_MODE_FIXED,
 	.dest_mode_logical		= false,
 
 	.disable_esr			= 0,
diff --git a/arch/x86/platform/uv/uv_irq.c b/arch/x86/platform/uv/uv_irq.c
index 4221259a5870..a379501b7a69 100644
--- a/arch/x86/platform/uv/uv_irq.c
+++ b/arch/x86/platform/uv/uv_irq.c
@@ -35,7 +35,7 @@ static void uv_program_mmr(struct irq_cfg *cfg, struct uv_irq_2_mmr_pnode *info)
 	mmr_value = 0;
 	entry = (struct uv_IO_APIC_route_entry *)&mmr_value;
 	entry->vector		= cfg->vector;
-	entry->delivery_mode	= apic->delivery_mode;
+	entry->delivery_mode	= APIC_DELIVERY_MODE_FIXED;
 	entry->dest_mode	= apic->dest_mode_logical;
 	entry->polarity		= 0;
 	entry->trigger		= 0;
diff --git a/drivers/pci/controller/pci-hyperv.c b/drivers/pci/controller/pci-hyperv.c
index bed3cefdaf19..f5d2ef8572e7 100644
--- a/drivers/pci/controller/pci-hyperv.c
+++ b/drivers/pci/controller/pci-hyperv.c
@@ -650,13 +650,6 @@ static void hv_arch_irq_unmask(struct irq_data *data)
 			   PCI_FUNC(pdev->devfn);
 	params->int_target.vector = hv_msi_get_int_vector(data);
 
-	/*
-	 * Honoring apic->delivery_mode set to APIC_DELIVERY_MODE_FIXED by
-	 * setting the HV_DEVICE_INTERRUPT_TARGET_MULTICAST flag results in a
-	 * spurious interrupt storm. Not doing so does not seem to have a
-	 * negative effect (yet?).
-	 */
-
 	if (hbus->protocol_version >= PCI_PROTOCOL_VERSION_1_2) {
 		/*
 		 * PCI_PROTOCOL_VERSION_1_2 supports the VP_SET version of the

-- 
2.30.2

[PATCH 2/3] x86/apic: Drop enum apic_delivery_modes

[Andrew Cooper]

The type is not used any more.

Replace the constants with plain defines so they can live outside of an
__ASSEMBLY__ block, allowing for more cleanup in subsequent changes.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
 arch/x86/include/asm/apicdef.h | 16 +++++++---------
 1 file changed, 7 insertions(+), 9 deletions(-)

diff --git a/arch/x86/include/asm/apicdef.h b/arch/x86/include/asm/apicdef.h
index 4b125e5b3187..ddcbf00db19d 100644
--- a/arch/x86/include/asm/apicdef.h
+++ b/arch/x86/include/asm/apicdef.h
@@ -20,6 +20,13 @@
  */
 #define IO_APIC_SLOT_SIZE		1024
 
+#define APIC_DELIVERY_MODE_FIXED	0
+#define APIC_DELIVERY_MODE_LOWESTPRIO	1
+#define APIC_DELIVERY_MODE_SMI		2
+#define APIC_DELIVERY_MODE_NMI		4
+#define APIC_DELIVERY_MODE_INIT		5
+#define APIC_DELIVERY_MODE_EXTINT	7
+
 #define	APIC_ID		0x20
 
 #define	APIC_LVR	0x30
@@ -430,14 +437,5 @@ struct local_apic {
  #define BAD_APICID 0xFFFFu
 #endif
 
-enum apic_delivery_modes {
-	APIC_DELIVERY_MODE_FIXED	= 0,
-	APIC_DELIVERY_MODE_LOWESTPRIO   = 1,
-	APIC_DELIVERY_MODE_SMI		= 2,
-	APIC_DELIVERY_MODE_NMI		= 4,
-	APIC_DELIVERY_MODE_INIT		= 5,
-	APIC_DELIVERY_MODE_EXTINT	= 7,
-};
-
 #endif /* !__ASSEMBLY__ */
 #endif /* _ASM_X86_APICDEF_H */

-- 
2.30.2

[PATCH 3/3] x86/apic: Drop struct local_apic

[Andrew Cooper]

This type predates recorded history in tglx/history.git, making it older
than Feb 5th 2002.

This structure is literally old enough to drink in most juristictions in
the world, and has not been used once in that time.

Lay it to rest in /dev/null.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
There is perhaps something to be said for the longevity of the comment.
"Not terribly well tested" certainly hasn't bitrotted in all this time.
---
 arch/x86/include/asm/apicdef.h | 260 -----------------------------------------
 1 file changed, 260 deletions(-)

diff --git a/arch/x86/include/asm/apicdef.h b/arch/x86/include/asm/apicdef.h
index ddcbf00db19d..094106b6a538 100644
--- a/arch/x86/include/asm/apicdef.h
+++ b/arch/x86/include/asm/apicdef.h
@@ -172,270 +172,10 @@
 #define APIC_CPUID(apicid)	((apicid) & XAPIC_DEST_CPUS_MASK)
 #define NUM_APIC_CLUSTERS	((BAD_APICID + 1) >> XAPIC_DEST_CPUS_SHIFT)
 
-#ifndef __ASSEMBLY__
-/*
- * the local APIC register structure, memory mapped. Not terribly well
- * tested, but we might eventually use this one in the future - the
- * problem why we cannot use it right now is the P5 APIC, it has an
- * errata which cannot take 8-bit reads and writes, only 32-bit ones ...
- */
-#define u32 unsigned int
-
-struct local_apic {
-
-/*000*/	struct { u32 __reserved[4]; } __reserved_01;
-
-/*010*/	struct { u32 __reserved[4]; } __reserved_02;
-
-/*020*/	struct { /* APIC ID Register */
-		u32   __reserved_1	: 24,
-			phys_apic_id	:  4,
-			__reserved_2	:  4;
-		u32 __reserved[3];
-	} id;
-
-/*030*/	const
-	struct { /* APIC Version Register */
-		u32   version		:  8,
-			__reserved_1	:  8,
-			max_lvt		:  8,
-			__reserved_2	:  8;
-		u32 __reserved[3];
-	} version;
-
-/*040*/	struct { u32 __reserved[4]; } __reserved_03;
-
-/*050*/	struct { u32 __reserved[4]; } __reserved_04;
-
-/*060*/	struct { u32 __reserved[4]; } __reserved_05;
-
-/*070*/	struct { u32 __reserved[4]; } __reserved_06;
-
-/*080*/	struct { /* Task Priority Register */
-		u32   priority	:  8,
-			__reserved_1	: 24;
-		u32 __reserved_2[3];
-	} tpr;
-
-/*090*/	const
-	struct { /* Arbitration Priority Register */
-		u32   priority	:  8,
-			__reserved_1	: 24;
-		u32 __reserved_2[3];
-	} apr;
-
-/*0A0*/	const
-	struct { /* Processor Priority Register */
-		u32   priority	:  8,
-			__reserved_1	: 24;
-		u32 __reserved_2[3];
-	} ppr;
-
-/*0B0*/	struct { /* End Of Interrupt Register */
-		u32   eoi;
-		u32 __reserved[3];
-	} eoi;
-
-/*0C0*/	struct { u32 __reserved[4]; } __reserved_07;
-
-/*0D0*/	struct { /* Logical Destination Register */
-		u32   __reserved_1	: 24,
-			logical_dest	:  8;
-		u32 __reserved_2[3];
-	} ldr;
-
-/*0E0*/	struct { /* Destination Format Register */
-		u32   __reserved_1	: 28,
-			model		:  4;
-		u32 __reserved_2[3];
-	} dfr;
-
-/*0F0*/	struct { /* Spurious Interrupt Vector Register */
-		u32	spurious_vector	:  8,
-			apic_enabled	:  1,
-			focus_cpu	:  1,
-			__reserved_2	: 22;
-		u32 __reserved_3[3];
-	} svr;
-
-/*100*/	struct { /* In Service Register */
-/*170*/		u32 bitfield;
-		u32 __reserved[3];
-	} isr [8];
-
-/*180*/	struct { /* Trigger Mode Register */
-/*1F0*/		u32 bitfield;
-		u32 __reserved[3];
-	} tmr [8];
-
-/*200*/	struct { /* Interrupt Request Register */
-/*270*/		u32 bitfield;
-		u32 __reserved[3];
-	} irr [8];
-
-/*280*/	union { /* Error Status Register */
-		struct {
-			u32   send_cs_error			:  1,
-				receive_cs_error		:  1,
-				send_accept_error		:  1,
-				receive_accept_error		:  1,
-				__reserved_1			:  1,
-				send_illegal_vector		:  1,
-				receive_illegal_vector		:  1,
-				illegal_register_address	:  1,
-				__reserved_2			: 24;
-			u32 __reserved_3[3];
-		} error_bits;
-		struct {
-			u32 errors;
-			u32 __reserved_3[3];
-		} all_errors;
-	} esr;
-
-/*290*/	struct { u32 __reserved[4]; } __reserved_08;
-
-/*2A0*/	struct { u32 __reserved[4]; } __reserved_09;
-
-/*2B0*/	struct { u32 __reserved[4]; } __reserved_10;
-
-/*2C0*/	struct { u32 __reserved[4]; } __reserved_11;
-
-/*2D0*/	struct { u32 __reserved[4]; } __reserved_12;
-
-/*2E0*/	struct { u32 __reserved[4]; } __reserved_13;
-
-/*2F0*/	struct { u32 __reserved[4]; } __reserved_14;
-
-/*300*/	struct { /* Interrupt Command Register 1 */
-		u32   vector			:  8,
-			delivery_mode		:  3,
-			destination_mode	:  1,
-			delivery_status		:  1,
-			__reserved_1		:  1,
-			level			:  1,
-			trigger			:  1,
-			__reserved_2		:  2,
-			shorthand		:  2,
-			__reserved_3		:  12;
-		u32 __reserved_4[3];
-	} icr1;
-
-/*310*/	struct { /* Interrupt Command Register 2 */
-		union {
-			u32   __reserved_1	: 24,
-				phys_dest	:  4,
-				__reserved_2	:  4;
-			u32   __reserved_3	: 24,
-				logical_dest	:  8;
-		} dest;
-		u32 __reserved_4[3];
-	} icr2;
-
-/*320*/	struct { /* LVT - Timer */
-		u32   vector		:  8,
-			__reserved_1	:  4,
-			delivery_status	:  1,
-			__reserved_2	:  3,
-			mask		:  1,
-			timer_mode	:  1,
-			__reserved_3	: 14;
-		u32 __reserved_4[3];
-	} lvt_timer;
-
-/*330*/	struct { /* LVT - Thermal Sensor */
-		u32  vector		:  8,
-			delivery_mode	:  3,
-			__reserved_1	:  1,
-			delivery_status	:  1,
-			__reserved_2	:  3,
-			mask		:  1,
-			__reserved_3	: 15;
-		u32 __reserved_4[3];
-	} lvt_thermal;
-
-/*340*/	struct { /* LVT - Performance Counter */
-		u32   vector		:  8,
-			delivery_mode	:  3,
-			__reserved_1	:  1,
-			delivery_status	:  1,
-			__reserved_2	:  3,
-			mask		:  1,
-			__reserved_3	: 15;
-		u32 __reserved_4[3];
-	} lvt_pc;
-
-/*350*/	struct { /* LVT - LINT0 */
-		u32   vector		:  8,
-			delivery_mode	:  3,
-			__reserved_1	:  1,
-			delivery_status	:  1,
-			polarity	:  1,
-			remote_irr	:  1,
-			trigger		:  1,
-			mask		:  1,
-			__reserved_2	: 15;
-		u32 __reserved_3[3];
-	} lvt_lint0;
-
-/*360*/	struct { /* LVT - LINT1 */
-		u32   vector		:  8,
-			delivery_mode	:  3,
-			__reserved_1	:  1,
-			delivery_status	:  1,
-			polarity	:  1,
-			remote_irr	:  1,
-			trigger		:  1,
-			mask		:  1,
-			__reserved_2	: 15;
-		u32 __reserved_3[3];
-	} lvt_lint1;
-
-/*370*/	struct { /* LVT - Error */
-		u32   vector		:  8,
-			__reserved_1	:  4,
-			delivery_status	:  1,
-			__reserved_2	:  3,
-			mask		:  1,
-			__reserved_3	: 15;
-		u32 __reserved_4[3];
-	} lvt_error;
-
-/*380*/	struct { /* Timer Initial Count Register */
-		u32   initial_count;
-		u32 __reserved_2[3];
-	} timer_icr;
-
-/*390*/	const
-	struct { /* Timer Current Count Register */
-		u32   curr_count;
-		u32 __reserved_2[3];
-	} timer_ccr;
-
-/*3A0*/	struct { u32 __reserved[4]; } __reserved_16;
-
-/*3B0*/	struct { u32 __reserved[4]; } __reserved_17;
-
-/*3C0*/	struct { u32 __reserved[4]; } __reserved_18;
-
-/*3D0*/	struct { u32 __reserved[4]; } __reserved_19;
-
-/*3E0*/	struct { /* Timer Divide Configuration Register */
-		u32   divisor		:  4,
-			__reserved_1	: 28;
-		u32 __reserved_2[3];
-	} timer_dcr;
-
-/*3F0*/	struct { u32 __reserved[4]; } __reserved_20;
-
-} __attribute__ ((packed));
-
-#undef u32
-
 #ifdef CONFIG_X86_32
  #define BAD_APICID 0xFFu
 #else
  #define BAD_APICID 0xFFFFu
 #endif
 
-#endif /* !__ASSEMBLY__ */
 #endif /* _ASM_X86_APICDEF_H */

-- 
2.30.2

Notes on BAD_APICID, Was: [PATCH 0/3] x86/apic: Misc pruning

[Andrew Cooper]

On 02/11/2023 12:26 pm, Andrew Cooper wrote:
> Seriously, this work started out trying to fix a buggy comment.  It
> escalated somewhat...  Perform some simple tidying.

Another dodgy construct spotted while doing this work is

#ifdef CONFIG_X86_32
 #define BAD_APICID 0xFFu
#else
 #define BAD_APICID 0xFFFFu
#endif

considering that both of those "bad" values are legal APIC IDs in an
x2APIC system.

The majority use is as a sentential (of varying types - int, u16
mostly), although the uses for NUM_APIC_CLUSTERS, and
safe_smp_processor_id() look suspect.

In particular, safe_smp_processor_id() *will* malfunction on some legal
CPUs, and needs to use -1 (32 bits wide) to spot the intended error case
of a bad xAPIC mapping.

However, it's use in amd_pmu_cpu_starting() from topology_die_id() looks
broken.  Partly because the error handling is (only) a WARN_ON_ONCE(),
and also because nb->nb_id's sentinel value is -1 of type int.

I suspect there's a lot of cleaning to be done here too.

~Andrew

Re: [PATCH 1/3] x86/apic: Drop apic::delivery_mode

[Steve Wahl]

On Thu, Nov 02, 2023 at 12:26:19PM +0000, Andrew Cooper wrote:
> This field is set to APIC_DELIVERY_MODE_FIXED in all cases, and is read
> exactly once.  Fold the constant in uv_program_mmr() and drop the field.
> 
> Searching for the origin of the stale HyperV comment reveals commit
> a31e58e129f7 ("x86/apic: Switch all APICs to Fixed delivery mode") which
> notes:
> 
>   As a consequence of this change, the apic::irq_delivery_mode field is
>   now pointless, but this needs to be cleaned up in a separate patch.
> 
> 6 years is long enough for this technical debt to have survived.
> 
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>

Reveiewed-by: Steve Wahl <steve.wahl@hpe.com>

> ---
>  arch/x86/include/asm/apic.h           | 2 --
>  arch/x86/kernel/apic/apic_flat_64.c   | 2 --
>  arch/x86/kernel/apic/apic_noop.c      | 1 -
>  arch/x86/kernel/apic/apic_numachip.c  | 2 --
>  arch/x86/kernel/apic/bigsmp_32.c      | 1 -
>  arch/x86/kernel/apic/probe_32.c       | 1 -
>  arch/x86/kernel/apic/x2apic_cluster.c | 1 -
>  arch/x86/kernel/apic/x2apic_phys.c    | 1 -
>  arch/x86/kernel/apic/x2apic_uv_x.c    | 1 -
>  arch/x86/platform/uv/uv_irq.c         | 2 +-
>  drivers/pci/controller/pci-hyperv.c   | 7 -------
>  11 files changed, 1 insertion(+), 20 deletions(-)
> 
> diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
> index 5af4ec1a0f71..841afbd7bfe7 100644
> --- a/arch/x86/include/asm/apic.h
> +++ b/arch/x86/include/asm/apic.h
> @@ -272,8 +272,6 @@ struct apic {
>  	void	(*send_IPI_all)(int vector);
>  	void	(*send_IPI_self)(int vector);
>  
> -	enum apic_delivery_modes delivery_mode;
> -
>  	u32	disable_esr		: 1,
>  		dest_mode_logical	: 1,
>  		x2apic_set_max_apicid	: 1;
> diff --git a/arch/x86/kernel/apic/apic_flat_64.c b/arch/x86/kernel/apic/apic_flat_64.c
> index 032a84e2c3cc..e526b226910b 100644
> --- a/arch/x86/kernel/apic/apic_flat_64.c
> +++ b/arch/x86/kernel/apic/apic_flat_64.c
> @@ -82,7 +82,6 @@ static struct apic apic_flat __ro_after_init = {
>  	.acpi_madt_oem_check		= flat_acpi_madt_oem_check,
>  	.apic_id_registered		= default_apic_id_registered,
>  
> -	.delivery_mode			= APIC_DELIVERY_MODE_FIXED,
>  	.dest_mode_logical		= true,
>  
>  	.disable_esr			= 0,
> @@ -153,7 +152,6 @@ static struct apic apic_physflat __ro_after_init = {
>  	.acpi_madt_oem_check		= physflat_acpi_madt_oem_check,
>  	.apic_id_registered		= default_apic_id_registered,
>  
> -	.delivery_mode			= APIC_DELIVERY_MODE_FIXED,
>  	.dest_mode_logical		= false,
>  
>  	.disable_esr			= 0,
> diff --git a/arch/x86/kernel/apic/apic_noop.c b/arch/x86/kernel/apic/apic_noop.c
> index 966d7cf10b95..70e7dfc3cc84 100644
> --- a/arch/x86/kernel/apic/apic_noop.c
> +++ b/arch/x86/kernel/apic/apic_noop.c
> @@ -45,7 +45,6 @@ static void noop_apic_write(u32 reg, u32 val)
>  struct apic apic_noop __ro_after_init = {
>  	.name				= "noop",
>  
> -	.delivery_mode			= APIC_DELIVERY_MODE_FIXED,
>  	.dest_mode_logical		= true,
>  
>  	.disable_esr			= 0,
> diff --git a/arch/x86/kernel/apic/apic_numachip.c b/arch/x86/kernel/apic/apic_numachip.c
> index 63f3d7be9dc7..8f5a42ad1f9f 100644
> --- a/arch/x86/kernel/apic/apic_numachip.c
> +++ b/arch/x86/kernel/apic/apic_numachip.c
> @@ -222,7 +222,6 @@ static const struct apic apic_numachip1 __refconst = {
>  	.probe				= numachip1_probe,
>  	.acpi_madt_oem_check		= numachip1_acpi_madt_oem_check,
>  
> -	.delivery_mode			= APIC_DELIVERY_MODE_FIXED,
>  	.dest_mode_logical		= false,
>  
>  	.disable_esr			= 0,
> @@ -259,7 +258,6 @@ static const struct apic apic_numachip2 __refconst = {
>  	.probe				= numachip2_probe,
>  	.acpi_madt_oem_check		= numachip2_acpi_madt_oem_check,
>  
> -	.delivery_mode			= APIC_DELIVERY_MODE_FIXED,
>  	.dest_mode_logical		= false,
>  
>  	.disable_esr			= 0,
> diff --git a/arch/x86/kernel/apic/bigsmp_32.c b/arch/x86/kernel/apic/bigsmp_32.c
> index 0e5535add4b5..863c3002a574 100644
> --- a/arch/x86/kernel/apic/bigsmp_32.c
> +++ b/arch/x86/kernel/apic/bigsmp_32.c
> @@ -80,7 +80,6 @@ static struct apic apic_bigsmp __ro_after_init = {
>  	.name				= "bigsmp",
>  	.probe				= probe_bigsmp,
>  
> -	.delivery_mode			= APIC_DELIVERY_MODE_FIXED,
>  	.dest_mode_logical		= false,
>  
>  	.disable_esr			= 1,
> diff --git a/arch/x86/kernel/apic/probe_32.c b/arch/x86/kernel/apic/probe_32.c
> index 9a06df6cdd68..f851ccf1e14f 100644
> --- a/arch/x86/kernel/apic/probe_32.c
> +++ b/arch/x86/kernel/apic/probe_32.c
> @@ -35,7 +35,6 @@ static struct apic apic_default __ro_after_init = {
>  	.probe				= probe_default,
>  	.apic_id_registered		= default_apic_id_registered,
>  
> -	.delivery_mode			= APIC_DELIVERY_MODE_FIXED,
>  	.dest_mode_logical		= true,
>  
>  	.disable_esr			= 0,
> diff --git a/arch/x86/kernel/apic/x2apic_cluster.c b/arch/x86/kernel/apic/x2apic_cluster.c
> index affbff65e497..7d15f6c3b718 100644
> --- a/arch/x86/kernel/apic/x2apic_cluster.c
> +++ b/arch/x86/kernel/apic/x2apic_cluster.c
> @@ -227,7 +227,6 @@ static struct apic apic_x2apic_cluster __ro_after_init = {
>  	.probe				= x2apic_cluster_probe,
>  	.acpi_madt_oem_check		= x2apic_acpi_madt_oem_check,
>  
> -	.delivery_mode			= APIC_DELIVERY_MODE_FIXED,
>  	.dest_mode_logical		= true,
>  
>  	.disable_esr			= 0,
> diff --git a/arch/x86/kernel/apic/x2apic_phys.c b/arch/x86/kernel/apic/x2apic_phys.c
> index 788cdb4ee394..8bb740e22b7d 100644
> --- a/arch/x86/kernel/apic/x2apic_phys.c
> +++ b/arch/x86/kernel/apic/x2apic_phys.c
> @@ -145,7 +145,6 @@ static struct apic apic_x2apic_phys __ro_after_init = {
>  	.probe				= x2apic_phys_probe,
>  	.acpi_madt_oem_check		= x2apic_acpi_madt_oem_check,
>  
> -	.delivery_mode			= APIC_DELIVERY_MODE_FIXED,
>  	.dest_mode_logical		= false,
>  
>  	.disable_esr			= 0,
> diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
> index 7d304ef1a7f5..ae4f0c1a7b43 100644
> --- a/arch/x86/kernel/apic/x2apic_uv_x.c
> +++ b/arch/x86/kernel/apic/x2apic_uv_x.c
> @@ -805,7 +805,6 @@ static struct apic apic_x2apic_uv_x __ro_after_init = {
>  	.probe				= uv_probe,
>  	.acpi_madt_oem_check		= uv_acpi_madt_oem_check,
>  
> -	.delivery_mode			= APIC_DELIVERY_MODE_FIXED,
>  	.dest_mode_logical		= false,
>  
>  	.disable_esr			= 0,
> diff --git a/arch/x86/platform/uv/uv_irq.c b/arch/x86/platform/uv/uv_irq.c
> index 4221259a5870..a379501b7a69 100644
> --- a/arch/x86/platform/uv/uv_irq.c
> +++ b/arch/x86/platform/uv/uv_irq.c
> @@ -35,7 +35,7 @@ static void uv_program_mmr(struct irq_cfg *cfg, struct uv_irq_2_mmr_pnode *info)
>  	mmr_value = 0;
>  	entry = (struct uv_IO_APIC_route_entry *)&mmr_value;
>  	entry->vector		= cfg->vector;
> -	entry->delivery_mode	= apic->delivery_mode;
> +	entry->delivery_mode	= APIC_DELIVERY_MODE_FIXED;
>  	entry->dest_mode	= apic->dest_mode_logical;
>  	entry->polarity		= 0;
>  	entry->trigger		= 0;
> diff --git a/drivers/pci/controller/pci-hyperv.c b/drivers/pci/controller/pci-hyperv.c
> index bed3cefdaf19..f5d2ef8572e7 100644
> --- a/drivers/pci/controller/pci-hyperv.c
> +++ b/drivers/pci/controller/pci-hyperv.c
> @@ -650,13 +650,6 @@ static void hv_arch_irq_unmask(struct irq_data *data)
>  			   PCI_FUNC(pdev->devfn);
>  	params->int_target.vector = hv_msi_get_int_vector(data);
>  
> -	/*
> -	 * Honoring apic->delivery_mode set to APIC_DELIVERY_MODE_FIXED by
> -	 * setting the HV_DEVICE_INTERRUPT_TARGET_MULTICAST flag results in a
> -	 * spurious interrupt storm. Not doing so does not seem to have a
> -	 * negative effect (yet?).
> -	 */
> -
>  	if (hbus->protocol_version >= PCI_PROTOCOL_VERSION_1_2) {
>  		/*
>  		 * PCI_PROTOCOL_VERSION_1_2 supports the VP_SET version of the
> 
> -- 
> 2.30.2
> 

-- 
Steve Wahl, Hewlett Packard Enterprise

Re: [PATCH 2/3] x86/apic: Drop enum apic_delivery_modes

[Steve Wahl]

On Thu, Nov 02, 2023 at 12:26:20PM +0000, Andrew Cooper wrote:
> The type is not used any more.
> 
> Replace the constants with plain defines so they can live outside of an
> __ASSEMBLY__ block, allowing for more cleanup in subsequent changes.
> 
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>

Reveiewed-by: Steve Wahl <steve.wahl@hpe.com>

> ---
>  arch/x86/include/asm/apicdef.h | 16 +++++++---------
>  1 file changed, 7 insertions(+), 9 deletions(-)
> 
> diff --git a/arch/x86/include/asm/apicdef.h b/arch/x86/include/asm/apicdef.h
> index 4b125e5b3187..ddcbf00db19d 100644
> --- a/arch/x86/include/asm/apicdef.h
> +++ b/arch/x86/include/asm/apicdef.h
> @@ -20,6 +20,13 @@
>   */
>  #define IO_APIC_SLOT_SIZE		1024
>  
> +#define APIC_DELIVERY_MODE_FIXED	0
> +#define APIC_DELIVERY_MODE_LOWESTPRIO	1
> +#define APIC_DELIVERY_MODE_SMI		2
> +#define APIC_DELIVERY_MODE_NMI		4
> +#define APIC_DELIVERY_MODE_INIT		5
> +#define APIC_DELIVERY_MODE_EXTINT	7
> +
>  #define	APIC_ID		0x20
>  
>  #define	APIC_LVR	0x30
> @@ -430,14 +437,5 @@ struct local_apic {
>   #define BAD_APICID 0xFFFFu
>  #endif
>  
> -enum apic_delivery_modes {
> -	APIC_DELIVERY_MODE_FIXED	= 0,
> -	APIC_DELIVERY_MODE_LOWESTPRIO   = 1,
> -	APIC_DELIVERY_MODE_SMI		= 2,
> -	APIC_DELIVERY_MODE_NMI		= 4,
> -	APIC_DELIVERY_MODE_INIT		= 5,
> -	APIC_DELIVERY_MODE_EXTINT	= 7,
> -};
> -
>  #endif /* !__ASSEMBLY__ */
>  #endif /* _ASM_X86_APICDEF_H */
> 
> -- 
> 2.30.2
> 

-- 
Steve Wahl, Hewlett Packard Enterprise

Re: [PATCH 3/3] x86/apic: Drop struct local_apic

[Steve Wahl]

On Thu, Nov 02, 2023 at 12:26:21PM +0000, Andrew Cooper wrote:
> This type predates recorded history in tglx/history.git, making it older
> than Feb 5th 2002.
> 
> This structure is literally old enough to drink in most juristictions in
> the world, and has not been used once in that time.
> 
> Lay it to rest in /dev/null.
> 
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
> ---
> There is perhaps something to be said for the longevity of the comment.
> "Not terribly well tested" certainly hasn't bitrotted in all this time.

   :-)  !!!

Reveiewed-by: Steve Wahl <steve.wahl@hpe.com>


> ---
>  arch/x86/include/asm/apicdef.h | 260 -----------------------------------------
>  1 file changed, 260 deletions(-)
> 
> diff --git a/arch/x86/include/asm/apicdef.h b/arch/x86/include/asm/apicdef.h
> index ddcbf00db19d..094106b6a538 100644
> --- a/arch/x86/include/asm/apicdef.h
> +++ b/arch/x86/include/asm/apicdef.h
> @@ -172,270 +172,10 @@
>  #define APIC_CPUID(apicid)	((apicid) & XAPIC_DEST_CPUS_MASK)
>  #define NUM_APIC_CLUSTERS	((BAD_APICID + 1) >> XAPIC_DEST_CPUS_SHIFT)
>  
> -#ifndef __ASSEMBLY__
> -/*
> - * the local APIC register structure, memory mapped. Not terribly well
> - * tested, but we might eventually use this one in the future - the
> - * problem why we cannot use it right now is the P5 APIC, it has an
> - * errata which cannot take 8-bit reads and writes, only 32-bit ones ...
> - */
> -#define u32 unsigned int
> -
> -struct local_apic {
> -
> -/*000*/	struct { u32 __reserved[4]; } __reserved_01;
> -
> -/*010*/	struct { u32 __reserved[4]; } __reserved_02;
> -
> -/*020*/	struct { /* APIC ID Register */
> -		u32   __reserved_1	: 24,
> -			phys_apic_id	:  4,
> -			__reserved_2	:  4;
> -		u32 __reserved[3];
> -	} id;
> -
> -/*030*/	const
> -	struct { /* APIC Version Register */
> -		u32   version		:  8,
> -			__reserved_1	:  8,
> -			max_lvt		:  8,
> -			__reserved_2	:  8;
> -		u32 __reserved[3];
> -	} version;
> -
> -/*040*/	struct { u32 __reserved[4]; } __reserved_03;
> -
> -/*050*/	struct { u32 __reserved[4]; } __reserved_04;
> -
> -/*060*/	struct { u32 __reserved[4]; } __reserved_05;
> -
> -/*070*/	struct { u32 __reserved[4]; } __reserved_06;
> -
> -/*080*/	struct { /* Task Priority Register */
> -		u32   priority	:  8,
> -			__reserved_1	: 24;
> -		u32 __reserved_2[3];
> -	} tpr;
> -
> -/*090*/	const
> -	struct { /* Arbitration Priority Register */
> -		u32   priority	:  8,
> -			__reserved_1	: 24;
> -		u32 __reserved_2[3];
> -	} apr;
> -
> -/*0A0*/	const
> -	struct { /* Processor Priority Register */
> -		u32   priority	:  8,
> -			__reserved_1	: 24;
> -		u32 __reserved_2[3];
> -	} ppr;
> -
> -/*0B0*/	struct { /* End Of Interrupt Register */
> -		u32   eoi;
> -		u32 __reserved[3];
> -	} eoi;
> -
> -/*0C0*/	struct { u32 __reserved[4]; } __reserved_07;
> -
> -/*0D0*/	struct { /* Logical Destination Register */
> -		u32   __reserved_1	: 24,
> -			logical_dest	:  8;
> -		u32 __reserved_2[3];
> -	} ldr;
> -
> -/*0E0*/	struct { /* Destination Format Register */
> -		u32   __reserved_1	: 28,
> -			model		:  4;
> -		u32 __reserved_2[3];
> -	} dfr;
> -
> -/*0F0*/	struct { /* Spurious Interrupt Vector Register */
> -		u32	spurious_vector	:  8,
> -			apic_enabled	:  1,
> -			focus_cpu	:  1,
> -			__reserved_2	: 22;
> -		u32 __reserved_3[3];
> -	} svr;
> -
> -/*100*/	struct { /* In Service Register */
> -/*170*/		u32 bitfield;
> -		u32 __reserved[3];
> -	} isr [8];
> -
> -/*180*/	struct { /* Trigger Mode Register */
> -/*1F0*/		u32 bitfield;
> -		u32 __reserved[3];
> -	} tmr [8];
> -
> -/*200*/	struct { /* Interrupt Request Register */
> -/*270*/		u32 bitfield;
> -		u32 __reserved[3];
> -	} irr [8];
> -
> -/*280*/	union { /* Error Status Register */
> -		struct {
> -			u32   send_cs_error			:  1,
> -				receive_cs_error		:  1,
> -				send_accept_error		:  1,
> -				receive_accept_error		:  1,
> -				__reserved_1			:  1,
> -				send_illegal_vector		:  1,
> -				receive_illegal_vector		:  1,
> -				illegal_register_address	:  1,
> -				__reserved_2			: 24;
> -			u32 __reserved_3[3];
> -		} error_bits;
> -		struct {
> -			u32 errors;
> -			u32 __reserved_3[3];
> -		} all_errors;
> -	} esr;
> -
> -/*290*/	struct { u32 __reserved[4]; } __reserved_08;
> -
> -/*2A0*/	struct { u32 __reserved[4]; } __reserved_09;
> -
> -/*2B0*/	struct { u32 __reserved[4]; } __reserved_10;
> -
> -/*2C0*/	struct { u32 __reserved[4]; } __reserved_11;
> -
> -/*2D0*/	struct { u32 __reserved[4]; } __reserved_12;
> -
> -/*2E0*/	struct { u32 __reserved[4]; } __reserved_13;
> -
> -/*2F0*/	struct { u32 __reserved[4]; } __reserved_14;
> -
> -/*300*/	struct { /* Interrupt Command Register 1 */
> -		u32   vector			:  8,
> -			delivery_mode		:  3,
> -			destination_mode	:  1,
> -			delivery_status		:  1,
> -			__reserved_1		:  1,
> -			level			:  1,
> -			trigger			:  1,
> -			__reserved_2		:  2,
> -			shorthand		:  2,
> -			__reserved_3		:  12;
> -		u32 __reserved_4[3];
> -	} icr1;
> -
> -/*310*/	struct { /* Interrupt Command Register 2 */
> -		union {
> -			u32   __reserved_1	: 24,
> -				phys_dest	:  4,
> -				__reserved_2	:  4;
> -			u32   __reserved_3	: 24,
> -				logical_dest	:  8;
> -		} dest;
> -		u32 __reserved_4[3];
> -	} icr2;
> -
> -/*320*/	struct { /* LVT - Timer */
> -		u32   vector		:  8,
> -			__reserved_1	:  4,
> -			delivery_status	:  1,
> -			__reserved_2	:  3,
> -			mask		:  1,
> -			timer_mode	:  1,
> -			__reserved_3	: 14;
> -		u32 __reserved_4[3];
> -	} lvt_timer;
> -
> -/*330*/	struct { /* LVT - Thermal Sensor */
> -		u32  vector		:  8,
> -			delivery_mode	:  3,
> -			__reserved_1	:  1,
> -			delivery_status	:  1,
> -			__reserved_2	:  3,
> -			mask		:  1,
> -			__reserved_3	: 15;
> -		u32 __reserved_4[3];
> -	} lvt_thermal;
> -
> -/*340*/	struct { /* LVT - Performance Counter */
> -		u32   vector		:  8,
> -			delivery_mode	:  3,
> -			__reserved_1	:  1,
> -			delivery_status	:  1,
> -			__reserved_2	:  3,
> -			mask		:  1,
> -			__reserved_3	: 15;
> -		u32 __reserved_4[3];
> -	} lvt_pc;
> -
> -/*350*/	struct { /* LVT - LINT0 */
> -		u32   vector		:  8,
> -			delivery_mode	:  3,
> -			__reserved_1	:  1,
> -			delivery_status	:  1,
> -			polarity	:  1,
> -			remote_irr	:  1,
> -			trigger		:  1,
> -			mask		:  1,
> -			__reserved_2	: 15;
> -		u32 __reserved_3[3];
> -	} lvt_lint0;
> -
> -/*360*/	struct { /* LVT - LINT1 */
> -		u32   vector		:  8,
> -			delivery_mode	:  3,
> -			__reserved_1	:  1,
> -			delivery_status	:  1,
> -			polarity	:  1,
> -			remote_irr	:  1,
> -			trigger		:  1,
> -			mask		:  1,
> -			__reserved_2	: 15;
> -		u32 __reserved_3[3];
> -	} lvt_lint1;
> -
> -/*370*/	struct { /* LVT - Error */
> -		u32   vector		:  8,
> -			__reserved_1	:  4,
> -			delivery_status	:  1,
> -			__reserved_2	:  3,
> -			mask		:  1,
> -			__reserved_3	: 15;
> -		u32 __reserved_4[3];
> -	} lvt_error;
> -
> -/*380*/	struct { /* Timer Initial Count Register */
> -		u32   initial_count;
> -		u32 __reserved_2[3];
> -	} timer_icr;
> -
> -/*390*/	const
> -	struct { /* Timer Current Count Register */
> -		u32   curr_count;
> -		u32 __reserved_2[3];
> -	} timer_ccr;
> -
> -/*3A0*/	struct { u32 __reserved[4]; } __reserved_16;
> -
> -/*3B0*/	struct { u32 __reserved[4]; } __reserved_17;
> -
> -/*3C0*/	struct { u32 __reserved[4]; } __reserved_18;
> -
> -/*3D0*/	struct { u32 __reserved[4]; } __reserved_19;
> -
> -/*3E0*/	struct { /* Timer Divide Configuration Register */
> -		u32   divisor		:  4,
> -			__reserved_1	: 28;
> -		u32 __reserved_2[3];
> -	} timer_dcr;
> -
> -/*3F0*/	struct { u32 __reserved[4]; } __reserved_20;
> -
> -} __attribute__ ((packed));
> -
> -#undef u32
> -
>  #ifdef CONFIG_X86_32
>   #define BAD_APICID 0xFFu
>  #else
>   #define BAD_APICID 0xFFFFu
>  #endif
>  
> -#endif /* !__ASSEMBLY__ */
>  #endif /* _ASM_X86_APICDEF_H */
> 
> -- 
> 2.30.2
> 

-- 
Steve Wahl, Hewlett Packard Enterprise

Re: [PATCH 1/3] x86/apic: Drop apic::delivery_mode

[Thomas Gleixner]

On Thu, Nov 02 2023 at 12:26, Andrew Cooper wrote:
> This field is set to APIC_DELIVERY_MODE_FIXED in all cases, and is read
> exactly once.  Fold the constant in uv_program_mmr() and drop the field.
>
> Searching for the origin of the stale HyperV comment reveals commit
> a31e58e129f7 ("x86/apic: Switch all APICs to Fixed delivery mode") which
> notes:
>
>   As a consequence of this change, the apic::irq_delivery_mode field is
>   now pointless, but this needs to be cleaned up in a separate patch.
>
> 6 years is long enough for this technical debt to have survived.

Guilty as charged. :)

Thanks for spotting this and cleaning it up!

       tglx

Re: Notes on BAD_APICID, Was: [PATCH 0/3] x86/apic: Misc pruning

[Thomas Gleixner]

On Fri, Nov 03 2023 at 19:58, Andrew Cooper wrote:
> On 02/11/2023 12:26 pm, Andrew Cooper wrote:
> Another dodgy construct spotted while doing this work is
>
> #ifdef CONFIG_X86_32
>  #define BAD_APICID 0xFFu
> #else
>  #define BAD_APICID 0xFFFFu
> #endif
>
> considering that both of those "bad" values are legal APIC IDs in an
> x2APIC system.
>
> The majority use is as a sentential (of varying types - int, u16
> mostly), although the uses for NUM_APIC_CLUSTERS, and
> safe_smp_processor_id() look suspect.
>
> In particular, safe_smp_processor_id() *will* malfunction on some legal
> CPUs, and needs to use -1 (32 bits wide) to spot the intended error case
> of a bad xAPIC mapping.
>
> However, it's use in amd_pmu_cpu_starting() from topology_die_id() looks
> broken.  Partly because the error handling is (only) a WARN_ON_ONCE(),
> and also because nb->nb_id's sentinel value is -1 of type int.
>
> I suspect there's a lot of cleaning to be done here too.

Sigh...

Re: [PATCH 3/3] x86/apic: Drop struct local_apic

[Ilpo Järvinen]

On Fri, 3 Nov 2023, Steve Wahl wrote:

> On Thu, Nov 02, 2023 at 12:26:21PM +0000, Andrew Cooper wrote:
> > This type predates recorded history in tglx/history.git, making it older
> > than Feb 5th 2002.
> > 
> > This structure is literally old enough to drink in most juristictions in
> > the world, and has not been used once in that time.
> > 
> > Lay it to rest in /dev/null.
> > 
> > Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
> > ---
> > There is perhaps something to be said for the longevity of the comment.
> > "Not terribly well tested" certainly hasn't bitrotted in all this time.
> 
>    :-)  !!!
> 
> Reveiewed-by: Steve Wahl <steve.wahl@hpe.com>

There's a typo in your tag (and it was copy-pasted to all patches of this
series).

-- 
 i.