From: Lukas Wunner <lukas@wunner.de>
To: Mario Limonciello <mario.limonciello@amd.com>
Cc: "Karol Herbst" <kherbst@redhat.com>,
"Lyude Paul" <lyude@redhat.com>,
"Alex Deucher" <alexander.deucher@amd.com>,
"Christian König" <christian.koenig@amd.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Hans de Goede" <hdegoede@redhat.com>,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
"Mika Westerberg" <mika.westerberg@linux.intel.com>,
"Danilo Krummrich" <dakr@redhat.com>,
"David Airlie" <airlied@gmail.com>,
"Daniel Vetter" <daniel@ffwll.ch>,
"Xinhui Pan" <Xinhui.Pan@amd.com>,
"Rafael J . Wysocki" <rafael@kernel.org>,
"Mark Gross" <markgross@kernel.org>,
"Andreas Noever" <andreas.noever@gmail.com>,
"Michael Jamet" <michael.jamet@intel.com>,
"Yehezkel Bernat" <YehezkelShB@gmail.com>,
"Pali Rohár" <pali@kernel.org>, "Marek Behún" <kabel@kernel.org>,
"Maciej W . Rozycki" <macro@orcam.me.uk>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"open list:DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS"
<dri-devel@lists.freedesktop.org>,
"open list:DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS"
<nouveau@lists.freedesktop.org>,
"open list" <linux-kernel@vger.kernel.org>,
"open list:RADEON and AMDGPU DRM DRIVERS"
<amd-gfx@lists.freedesktop.org>,
"open list:PCI SUBSYSTEM" <linux-pci@vger.kernel.org>,
"open list:ACPI" <linux-acpi@vger.kernel.org>,
"open list:X86 PLATFORM DRIVERS"
<platform-driver-x86@vger.kernel.org>,
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Subject: Re: [PATCH v2 6/9] PCI: Rename is_thunderbolt to is_tunneled
Date: Mon, 6 Nov 2023 19:18:18 +0100 [thread overview]
Message-ID: <20231106181818.GB18564@wunner.de> (raw)
In-Reply-To: <9b1a5e36-337b-4750-9dad-b54e28cde03a@amd.com>
On Mon, Nov 06, 2023 at 10:59:13AM -0600, Mario Limonciello wrote:
> On 11/5/2023 11:39, Lukas Wunner wrote:
> > On Fri, Nov 03, 2023 at 02:07:55PM -0500, Mario Limonciello wrote:
> > > The `is_thunderbolt` bit has been used to indicate that a PCIe device
> > > contained the Intel VSEC which is used by various parts of the kernel
> > > to change behavior. To later allow usage with USB4 controllers as well,
> > > rename this to `is_tunneled`.
> >
> > This doesn't seem to make sense. is_thunderbolt indicates that a device
> > is part of a Thunderbolt controller. See the code comment:
> >
> > > - unsigned int is_thunderbolt:1; /* Thunderbolt controller */
> >
> > A Thunderbolt controller is not necessarily tunneled. The PCIe switch,
> > NHI and XHCI of the Thunderbolt host controller are not tunneled at all.
>
> I could really use some clarification which PCIe devices actually contain
> the Intel VSEC.
>
> Is it in all 3 of those PCIe devices and not just the switch?
Yes, I've just double-checked Light Ridge, Cactus Ridge, Alpine Ridge.
Thanks,
Lukas
next prev parent reply other threads:[~2023-11-06 18:18 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-03 19:07 [PATCH v2 0/9] Improvements to pcie_bandwidth_available() for eGPUs Mario Limonciello
2023-11-03 19:07 ` [PATCH v2 1/9] drm/nouveau: Switch from pci_is_thunderbolt_attached() to dev_is_removable() Mario Limonciello
2023-11-06 12:25 ` Ilpo Järvinen
2023-11-06 16:47 ` Mika Westerberg
2023-11-06 16:49 ` Mario Limonciello
2023-11-03 19:07 ` [PATCH v2 2/9] drm/radeon: " Mario Limonciello
2023-11-06 12:27 ` Ilpo Järvinen
2023-11-03 19:07 ` [PATCH v2 3/9] PCI: Drop pci_is_thunderbolt_attached() Mario Limonciello
2023-11-04 0:37 ` kernel test robot
2023-11-06 12:33 ` Ilpo Järvinen
2023-11-06 16:46 ` Mario Limonciello
2023-11-03 19:07 ` [PATCH v2 4/9] PCI: Move the `PCI_CLASS_SERIAL_USB_USB4` definition to common header Mario Limonciello
2023-11-03 19:07 ` [PATCH v2 5/9] PCI: pciehp: Move check for is_thunderbolt into a quirk Mario Limonciello
2023-11-06 12:41 ` Ilpo Järvinen
2023-11-06 16:50 ` Mario Limonciello
2023-11-03 19:07 ` [PATCH v2 6/9] PCI: Rename is_thunderbolt to is_tunneled Mario Limonciello
2023-11-03 19:38 ` Hans de Goede
2023-11-05 17:39 ` Lukas Wunner
2023-11-06 16:59 ` Mario Limonciello
2023-11-06 18:18 ` Lukas Wunner [this message]
2023-11-03 19:07 ` [PATCH v2 7/9] PCI: ACPI: Detect PCIe root ports that are used for tunneling Mario Limonciello
2023-11-03 19:07 ` [PATCH v2 8/9] PCI: Exclude PCIe ports used for tunneling in pcie_bandwidth_available() Mario Limonciello
2023-11-04 6:57 ` Lazar, Lijo
2023-11-06 12:52 ` Ilpo Järvinen
2023-11-06 16:51 ` Mario Limonciello
2023-11-06 18:10 ` Lukas Wunner
2023-11-06 18:44 ` Mario Limonciello
2023-11-06 18:56 ` Lukas Wunner
2023-11-07 5:45 ` Mika Westerberg
2023-11-07 6:24 ` Mika Westerberg
2023-11-03 19:07 ` [PATCH v2 9/9] PCI: Add a quirk to mark 0x8086 : 0x9a23 as supporting PCIe tunneling Mario Limonciello
2023-11-03 19:20 ` [PATCH v2 0/9] Improvements to pcie_bandwidth_available() for eGPUs Bjorn Helgaas
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