Linux PCI subsystem development
 help / color / mirror / Atom feed
From: Manivannan Sadhasivam <mani@kernel.org>
To: Serge Semin <fancer.lancer@gmail.com>
Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,
	lpieralisi@kernel.org, kw@linux.com, robh@kernel.org,
	bhelgaas@google.com, jingoohan1@gmail.com,
	gustavo.pimentel@synopsys.com, linux-pci@vger.kernel.org,
	linux-renesas-soc@vger.kernel.org
Subject: Re: [PATCH v2 4/6] PCI: dwc: Add dw_pcie_ep_{read,write}_dbi[2] helpers
Date: Fri, 17 Nov 2023 14:49:11 +0530	[thread overview]
Message-ID: <20231117091911.GF250770@thinkpad> (raw)
In-Reply-To: <qpw6zgqnxvnxqwzilelaev26xmjebimnyyvc5jzfgdyqgvjyvq@sne5unvwbea4>

On Tue, Nov 14, 2023 at 01:52:24PM +0300, Serge Semin wrote:
> On Tue, Nov 14, 2023 at 02:54:54PM +0900, Yoshihiro Shimoda wrote:
> > The current code calculated some dbi[2] registers' offset by calling
> > dw_pcie_ep_get_dbi[2]_offset() in each function. To improve code
> > readability, add dw_pcie_ep_{read,write}_dbi[2} and some data-width
> > related helpers.
> 
> Nice update. Thanks!
> Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
> 
> I'll replicate my v1 nitpick regarding the accessors location here so
> the maintainers would decide whether it worth being taken into
> account.
> 
> > 
> > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> > ---
> >  .../pci/controller/dwc/pcie-designware-ep.c   | 231 ++++++++++--------
> >  1 file changed, 129 insertions(+), 102 deletions(-)
> > 
> > diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
> > index 1100671db887..2b5b5b0fa7a9 100644
> > --- a/drivers/pci/controller/dwc/pcie-designware-ep.c
> > +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
> > @@ -65,24 +65,88 @@ static unsigned int dw_pcie_ep_get_dbi2_offset(struct dw_pcie_ep *ep, u8 func_no
> >  	return dbi2_offset;
> >  }
> >  
> > +static u32 dw_pcie_ep_read_dbi(struct dw_pcie_ep *ep, u8 func_no, u32 reg,
> > +			       size_t size)
> > +{
> > +	unsigned int offset = dw_pcie_ep_get_dbi_offset(ep, func_no);
> > +	struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
> > +
> > +	return dw_pcie_read_dbi(pci, offset + reg, size);
> > +}
> > +
> > +static void dw_pcie_ep_write_dbi(struct dw_pcie_ep *ep, u8 func_no, u32 reg,
> > +				 size_t size, u32 val)
> > +{
> > +	unsigned int offset = dw_pcie_ep_get_dbi_offset(ep, func_no);
> > +	struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
> > +
> > +	dw_pcie_write_dbi(pci, offset + reg, size, val);
> > +}
> > +
> > +static void dw_pcie_ep_write_dbi2(struct dw_pcie_ep *ep, u8 func_no, u32 reg,
> > +				  size_t size, u32 val)
> > +{
> > +	unsigned int offset = dw_pcie_ep_get_dbi2_offset(ep, func_no);
> > +	struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
> > +
> > +	dw_pcie_write_dbi2(pci, offset + reg, size, val);
> > +}
> > +
> > +static inline void dw_pcie_ep_writel_dbi(struct dw_pcie_ep *ep, u8 func_no,
> > +					 u32 reg, u32 val)
> > +{
> > +	dw_pcie_ep_write_dbi(ep, func_no, reg, 0x4, val);
> > +}
> > +
> > +static inline u32 dw_pcie_ep_readl_dbi(struct dw_pcie_ep *ep, u8 func_no,
> > +				       u32 reg)
> > +{
> > +	return dw_pcie_ep_read_dbi(ep, func_no, reg, 0x4);
> > +}
> > +
> > +static inline void dw_pcie_ep_writew_dbi(struct dw_pcie_ep *ep, u8 func_no,
> > +					 u32 reg, u16 val)
> > +{
> > +	dw_pcie_ep_write_dbi(ep, func_no, reg, 0x2, val);
> > +}
> > +
> > +static inline u16 dw_pcie_ep_readw_dbi(struct dw_pcie_ep *ep, u8 func_no,
> > +				       u32 reg)
> > +{
> > +	return dw_pcie_ep_read_dbi(ep, func_no, reg, 0x2);
> > +}
> > +
> > +static inline void dw_pcie_ep_writeb_dbi(struct dw_pcie_ep *ep, u8 func_no,
> > +					 u32 reg, u8 val)
> > +{
> > +	dw_pcie_ep_write_dbi(ep, func_no, reg, 0x1, val);
> > +}
> > +
> > +static inline u8 dw_pcie_ep_readb_dbi(struct dw_pcie_ep *ep, u8 func_no,
> > +				      u32 reg)
> > +{
> > +	return dw_pcie_ep_read_dbi(ep, func_no, reg, 0x1);
> > +}
> > +
> > +static inline void dw_pcie_ep_writel_dbi2(struct dw_pcie_ep *ep, u8 func_no,
> > +					  u32 reg, u32 val)
> > +{
> > +	dw_pcie_ep_write_dbi2(ep, func_no, reg, 0x4, val);
> > +}
> > +
> 
> My comment was:
> 
> > From: Serge Semin, Sent: Monday, November 13, 2023 9:41 PM
> > > I am not sure whether the methods above are supposed to be defined
> > > here instead of being moved to the "pcie-designware.h" header file
> > > together with dw_pcie_ep_get_dbi2_offset() and
> > > dw_pcie_ep_get_dbi_offset(). The later place seems more suitable
> > > seeing the accessors are generic, look similar to the
> > > dw_pcie_{write,read}_dbi{,2}() functions and might be useful in the
> > > platform drivers. On the other hand no LLDDs would have used it
> > > currently. So I'll leave this as a food for thoughts for the driver
> > > and subsystem maintainers.
> 
> Yoshihiro replied:
> > Perhaps, when a device driver needs to use these functions actually,
> > we can move these functions to pcie-designware.h, I think.
> 

I agree with you. Since these are read/write accessors, it would be better to
move them to the header file instead.

- Mani

-- 
மணிவண்ணன் சதாசிவம்

  reply	other threads:[~2023-11-17  9:19 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-14  5:54 [PATCH v2 0/6] PCI: controllers: tidy code up Yoshihiro Shimoda
2023-11-14  5:54 ` [PATCH v2 1/6] PCI: dwc: Drop host prefix from struct dw_pcie_host_ops Yoshihiro Shimoda
2023-11-14 10:42   ` Serge Semin
2023-11-15 14:23   ` Jesper Nilsson
2023-11-16  0:15   ` nobuhiro1.iwamatsu
2023-11-17  9:10   ` Manivannan Sadhasivam
2023-11-21  1:15   ` Kunihiko Hayashi
2023-11-21  2:33   ` Heiko Stübner
2023-11-21  6:34   ` Lei Chuan Hua
2023-11-21  8:00   ` Thomas Petazzoni
2023-11-14  5:54 ` [PATCH v2 2/6] PCI: dwc: Rename to .init in struct dw_pcie_ep_ops Yoshihiro Shimoda
2023-11-14 10:44   ` Serge Semin
2023-11-15  9:09   ` Thokala, Srikanth
2023-11-15 14:23   ` Jesper Nilsson
2023-11-17  9:13   ` Manivannan Sadhasivam
2023-11-21  1:15   ` Kunihiko Hayashi
2023-11-14  5:54 ` [PATCH v2 3/6] PCI: dwc: Rename to .get_dbi_offset " Yoshihiro Shimoda
2023-11-17  9:14   ` Manivannan Sadhasivam
2023-11-14  5:54 ` [PATCH v2 4/6] PCI: dwc: Add dw_pcie_ep_{read,write}_dbi[2] helpers Yoshihiro Shimoda
2023-11-14 10:52   ` Serge Semin
2023-11-17  9:19     ` Manivannan Sadhasivam [this message]
2023-12-15  1:13       ` Yoshihiro Shimoda
2023-11-14  5:54 ` [PATCH v2 5/6] PCI: iproc: fix -Wvoid-pointer-to-enum-cast warning Yoshihiro Shimoda
2023-11-14  8:10   ` Geert Uytterhoeven
2023-11-17  9:21   ` Manivannan Sadhasivam
2023-12-15  1:20     ` Yoshihiro Shimoda
2023-11-14  5:54 ` [PATCH v2 6/6] PCI: rcar-gen4: " Yoshihiro Shimoda
2023-11-14  8:11   ` Geert Uytterhoeven
2023-11-17  9:28   ` Manivannan Sadhasivam
2023-12-14  2:35 ` [PATCH v2 0/6] PCI: controllers: tidy code up Yoshihiro Shimoda
2023-12-14  9:40   ` Serge Semin
2023-12-14 10:26     ` Manivannan Sadhasivam
2023-12-14 23:44       ` Yoshihiro Shimoda

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20231117091911.GF250770@thinkpad \
    --to=mani@kernel.org \
    --cc=bhelgaas@google.com \
    --cc=fancer.lancer@gmail.com \
    --cc=gustavo.pimentel@synopsys.com \
    --cc=jingoohan1@gmail.com \
    --cc=kw@linux.com \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-renesas-soc@vger.kernel.org \
    --cc=lpieralisi@kernel.org \
    --cc=robh@kernel.org \
    --cc=yoshihiro.shimoda.uh@renesas.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox