From: Bjorn Helgaas <helgaas@kernel.org>
To: Nikita Proshkin <n.proshkin@yadro.com>
Cc: linux-pci@vger.kernel.org, Martin Mares <mj@ucw.cz>,
linux@yadro.com,
Sergei Miroshnichenko <s.miroshnichenko@yadro.com>
Subject: Re: [PATCH 15/15] pciutils-pcilmr: Add pcilmr man page
Date: Fri, 8 Dec 2023 11:24:04 -0600 [thread overview]
Message-ID: <20231208172404.GA797244@bhelgaas> (raw)
In-Reply-To: <20231208091734.12225-16-n.proshkin@yadro.com>
I'm not a hardware person, but this looks like interesting work!
On Fri, Dec 08, 2023 at 12:17:34PM +0300, Nikita Proshkin wrote:
> +Turn off PCIE Leaky Bucket Feature, Re-Equalization and Link Degradation;
s/PCIE/PCIe/ to match other uses here.
> +The current Link data rate must be 16.0 GT/s or higher (right now
> +utility supports Gen 4 and 5 Links);
So far, each major PCIe spec revision has added a single new data
rate, but that may not always be true, and the spec always uses
terminology like "16.0 GT/s or higher" instead of terms like "Gen 4".
So "supports 16.0 GT/s and 32.0 GT/s Links" might be clearer.
> +The Gen 5 Specification sets allowed range for Timing Margin from 20%\~UI to 50%\~UI and
Usage in the spec itself would be more like "PCIe Base Spec Revision 5.0"
since it doesn't use "Gen 5".
> +According to spec it's possible for Receiver to margin up to MaxLanes + 1
> +lanes simultaneously, but usually this works bad, so this option is for
s/works bad/works poorly/
> +experiments mostly.
next prev parent reply other threads:[~2023-12-08 17:24 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-08 9:17 [PATCH 00/15] pciutils: Add utility for Lane Margining Nikita Proshkin
2023-12-08 9:17 ` [PATCH 01/15] pciutils-lspci: Fix unsynchronized caches in lspci struct device and pci struct pci_dev Nikita Proshkin
2023-12-08 9:17 ` [PATCH 02/15] pciutils: Add constants for Lane Margining at the Receiver Extended Capability Nikita Proshkin
2023-12-08 9:17 ` [PATCH 03/15] pciutils-lspci: Add Lane Margining support to the lspci Nikita Proshkin
2023-12-08 9:17 ` [PATCH 04/15] pciutils-pcilmr: Add functions for device checking and preparations before main margining processes Nikita Proshkin
2023-12-08 17:30 ` Martin Mareš
2023-12-13 10:10 ` Nikita Proshkin
2023-12-08 9:17 ` [PATCH 05/15] pciutils-pcilmr: Add margining process functions Nikita Proshkin
2023-12-08 17:35 ` Martin Mareš
2023-12-13 10:35 ` Nikita Proshkin
2023-12-08 9:17 ` [PATCH 06/15] pciutils-pcilmr: Add logging functions for margining Nikita Proshkin
2023-12-08 17:37 ` Martin Mareš
2023-12-08 9:17 ` [PATCH 07/15] pciutils-pcilmr: Add all-in-one device margining parameters reading function Nikita Proshkin
2023-12-08 9:17 ` [PATCH 08/15] pciutils-pcilmr: Add function for default margining results log Nikita Proshkin
2023-12-08 9:17 ` [PATCH 09/15] pciutils-pcilmr: Add utility main function Nikita Proshkin
2023-12-08 9:17 ` [PATCH 10/15] pciutils-pcilmr: Add support for unique hardware quirks Nikita Proshkin
2023-12-08 17:38 ` Martin Mareš
2023-12-13 10:40 ` Nikita Proshkin
2023-12-08 9:17 ` [PATCH 11/15] pciutils-pcilmr: Add the ability to pass multiple links to the utility Nikita Proshkin
2023-12-08 9:17 ` [PATCH 12/15] pciutils-pcilmr: Add --scan mode to search for all LMR-capable Links Nikita Proshkin
2023-12-08 9:17 ` [PATCH 13/15] pciutils-pcilmr: Add option to save margining results in csv form Nikita Proshkin
2023-12-08 17:44 ` Martin Mareš
2023-12-13 10:52 ` Nikita Proshkin
2023-12-13 11:22 ` Martin Mareš
2023-12-13 13:01 ` Nikita Proshkin
2023-12-08 9:17 ` [PATCH 14/15] pciutils-pcilmr: Add handling of situations when device reports its MaxOffset values equal to 0 Nikita Proshkin
2023-12-08 9:17 ` [PATCH 15/15] pciutils-pcilmr: Add pcilmr man page Nikita Proshkin
2023-12-08 17:24 ` Bjorn Helgaas [this message]
2023-12-13 11:01 ` Nikita Proshkin
2023-12-08 17:30 ` [PATCH 00/15] pciutils: Add utility for Lane Margining Martin Mareš
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20231208172404.GA797244@bhelgaas \
--to=helgaas@kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux@yadro.com \
--cc=mj@ucw.cz \
--cc=n.proshkin@yadro.com \
--cc=s.miroshnichenko@yadro.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).