From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7B87E5C9C; Tue, 26 Dec 2023 23:59:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="oZmb+/AR" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D60DEC433C8; Tue, 26 Dec 2023 23:59:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1703635189; bh=qL1wC5X84nPiUycGi2oBV74C3XrBRi70qn0cE9NjEuw=; h=Date:From:To:Cc:Subject:In-Reply-To:From; b=oZmb+/ARlpg5Vk9sAtF9KzheCjXEuUzBHt4QSukwKfevMLwNuA718EHgKWkezuSap FnpUUIw2CJIWFLQPekgw2XMyfGkCwvlN8pNx7oh6R/opBliTvtAUC/rSEnYzVtU3z7 nVzgIA6Df0IdTnlg2I+Ij9sWbQl5JhwO9Acj9+ZtIe8qs7+3bqRGL7HG0WYOrwz4l+ HBNoxyb9vP1WtIXzoa9a2mNY+lJqGmWlg4l4FeBdNWane0edoijGuRna4lt9hm33vI a944CVCRqrBPPfgCkbca+6pU4km9DzyULAF8AWehhec5vtEMv7iV4I+G0PghkeoRfp AppR4fTl7e5MA== Date: Tue, 26 Dec 2023 17:59:47 -0600 From: Bjorn Helgaas To: Peter Robinson Cc: Tom Joseph , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org Subject: Re: [PATCH] PCI: cadence: Fix TI J721E PCIe SoC dependencies Message-ID: <20231226235947.GA1483922@bhelgaas> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231220113214.413632-1-pbrobinson@gmail.com> On Wed, Dec 20, 2023 at 11:32:08AM +0000, Peter Robinson wrote: > The J721E PCIe is hardware specific to the TI SoC parts > so add a depenency on that so it's available for those dependency > SoC parts and for compile testing but not necessarily > everyone who enables the Cadence PCIe controller. Wrap to fill 75 columns. The subject could possibly be more specific than "fix", e.g., PCI: cadence: Make TI J721E depend on ARCH_K3 > Signed-off-by: Peter Robinson > --- > drivers/pci/controller/cadence/Kconfig | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/pci/controller/cadence/Kconfig b/drivers/pci/controller/cadence/Kconfig > index 291d12711363..1d5a70c9055e 100644 > --- a/drivers/pci/controller/cadence/Kconfig > +++ b/drivers/pci/controller/cadence/Kconfig > @@ -47,6 +47,7 @@ config PCI_J721E > > config PCI_J721E_HOST > bool "TI J721E PCIe controller (host mode)" > + depends on ARCH_K3 || COMPILE_TEST > depends on OF > select PCIE_CADENCE_HOST > select PCI_J721E > @@ -57,6 +58,7 @@ config PCI_J721E_HOST > > config PCI_J721E_EP > bool "TI J721E PCIe controller (endpoint mode)" > + depends on ARCH_K3 || COMPILE_TEST > depends on OF > depends on PCI_ENDPOINT > select PCIE_CADENCE_EP > -- > 2.43.0 >