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Date: Fri, 12 Jan 2024 15:19:59 -0600
From: Bjorn Helgaas <helgaas@kernel.org>
To: Alexey Kardashevskiy <aik@amd.com>
Cc: linux-pci@vger.kernel.org, Martin =?utf-8?B?TWFyZcWh?= <mj@ucw.cz>,
	Jonathan Cameron <Jonathan.Cameron@huawei.com>
Subject: Re: [PATCH pciutils 2/2] pciutils: Add decode support for IDE
 Extended Capability
Message-ID: <20240112211959.GA2282480@bhelgaas>
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In-Reply-To: <20231230124239.310927-3-aik@amd.com>

On Sat, Dec 30, 2023 at 11:42:39PM +1100, Alexey Kardashevskiy wrote:
> IDE (Integrity & Data Encryption) Extended Capability defined in [1]
> implements control of the PCI link encryption.
> 
> The example output is:
> 
> Capabilities: [830 v1] IDE

Possibly expand "IDE"?  Many other Capabilities are spelled out:

  Capabilities: [c0] Express Downstream Port (Slot+), MSI 00
  Capabilities: [100] Device Serial Number 5f-2f-9d-40-30-f1-0c-00
  Capabilities: [200] Advanced Error Reporting
  Capabilities: [300] Virtual Channel
  Capabilities: [400] Power Budgeting <?>
  Capabilities: [500] Vendor Specific Information: ID=1234 Rev=1 Len=0d8 <?>
  Capabilities: [700] Secondary PCI Express