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Tue, 23 Jan 2024 01:59:26 -0800 (PST) Received: from thinkpad ([120.56.197.174]) by smtp.gmail.com with ESMTPSA id de32-20020a05620a372000b00783aa2c9a1bsm547585qkb.103.2024.01.23.01.59.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Jan 2024 01:59:26 -0800 (PST) Date: Tue, 23 Jan 2024 15:29:20 +0530 From: Manivannan Sadhasivam To: Niklas Cassel Cc: "linux-pci@vger.kernel.org" , Damien Le Moal , Vidya Sagar Subject: Re: [PATCH v7 1/2] PCI: designware-ep: Fix DBI access before core init Message-ID: <20240123095920.GC19029@thinkpad> References: <20231129155140.GC7621@thinkpad> <20231130063800.GD3043@thinkpad> <20231130135757.GS3043@thinkpad> <20240106151238.GC2512@thinkpad> <20240119070116.GA2866@thinkpad> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Tue, Jan 23, 2024 at 09:18:31AM +0000, Niklas Cassel wrote: > On Fri, Jan 19, 2024 at 12:58:46PM +0530, Manivannan Sadhasivam wrote: > > On Thu, Jan 18, 2024 at 06:33:35PM +0000, Niklas Cassel wrote: > > (snip) > > > > A nicer solution would probably be to modify dw_pcie_ep_set_bar() to > > > properly handle controllers with the Resizable BAR capability, and remove > > > the RESBAR related code from dw_pcie_ep_init_complete(). > > > > > > However, that would still require changes in pci-epf-test.c to call > > > set_bar() after a hot reset/link-down reset (and it is not possible > > > to distinguish between them), which could be done by either: > > > 1) Making sure that the glue drivers (that implement Resizable BAR capability) > > > call dw_pcie_ep_init_notify() when receiving a hot reset/link-down reset > > > IRQ (or maybe instead when getting the link up IRQ), as that will > > > trigger pci-epf-test.c to (once again) call set_bar(). > > > or > > > 2) Modifying pci-epf-test.c:pci_epf_test_link_up() to call set_bar() > > > (If epc_features doesn't have a core_init_notifier, as in that case > > > set_bar() is called by pci_epf_test_core_init()). > > > (Since I assume that not all SoCs might have a PERST GPIO.) > > > or > > > 3) We could allow glue drivers that use an internal refclk to still make > > > use of the PERST GPIO IRQ, and only call dw_pcie_ep_init_notify(), > > > as that would also cause pci-epf-test.c to call set_bar(). > > > (These glue drivers, which implement the Resizable BAR capability would > > > however not need to perform a full core reset, etc. in the PERST GPIO > > > IRQ handler, they only need to call dw_pcie_ep_init_notify().) > > > > > > Right now, I think I prefer 1). > > > > > > What do you think? > > > > > > > [For this context, I'm not only focusing on REBAR but all of the non-sticky DWC > > registers] > > > > If the PCIe spec has mandated using PERST# for all endpoints, I would've > > definitely went with option 3. But the spec has made PERST# as optional for the > > endpoints, so we cannot force the glue drivers to make use of PERST# IRQ. > > > > But the solution I'm thinking is, we should reconfigure all non-sticky DWC > > registers during LINK_DOWN phase irrespective of whether core_init_notifier is > > used or not. This should work for both cases because we can skip configuring the > > DWC registers when the core_init platforms try to do it again during PERST# > > deassert. > > > > Wdyt? > > I'm guessing you mean something like, create a dw_pcie_ep_linkdown() function, > that: > 1) calls a dwc_pcie_ep_reinit_non_sticky() This could be "dwc_pcie_ep_init_non_sticky" since we can reuse this function during init and reinit phase. We can have a separate flag to check whether is performed or not. > 2) calls pci_epc_linkdown() > > If so, I like the suggestion. > Yes, this is what I meant. > > The only problem I can see is that not all DWC EP glue drivers might have > an IRQ for link down. But I don't see any better way. > (I guess the glue drivers that don't have an IRQ on link down could have a > kthread that polls dw_pcie_link_up(), if they want to be able to handle the > RC/host rebooting.) > Yeah, if the EPC driver doesn't catch PERST# or LINK_DOWN then I would consider it as doomed. > One thing comes to mind though... > Some EPF drivers might have a .link_down handler, which might e.g. dealloc the > memory backing the BARs. But I guess that is fine, as long as we have called > dwc_pcie_ep_reinit_non_sticky() before calling pci_epc_linkdown(), the > non-sticky registers have been re-initialized, so even if a EPF driver performs > a .link_down() + .link_up(), the non-sticky registers in DWC core should still > have proper values set. > Yeah, there is no fixed rule on what the EPF drivers need to do during these callbacks. So as long as we init the registers, it shouldn't matter. - Mani -- மணிவண்ணன் சதாசிவம்