From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: "Ajay Agarwal" <ajayagarwal@google.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Jingoo Han" <jingoohan1@gmail.com>,
"Johan Hovold" <johan+linaro@kernel.org>,
"Jon Hunter" <jonathanh@nvidia.com>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Manu Gautam" <manugautam@google.com>,
"Doug Zobel" <zobel@google.com>,
"William McVicker" <willmcvicker@google.com>,
"Serge Semin" <fancer.lancer@gmail.com>,
"Robin Murphy" <robin.murphy@arm.com>,
linux-pci@vger.kernel.org, Joao.Pinto@synopsys.com
Subject: Re: [PATCH v5] PCI: dwc: Wait for link up only if link is started
Date: Thu, 15 Feb 2024 19:39:08 +0530 [thread overview]
Message-ID: <20240215140908.GA3619@thinkpad> (raw)
In-Reply-To: <20240214220228.GA1266356@bhelgaas>
On Wed, Feb 14, 2024 at 04:02:28PM -0600, Bjorn Helgaas wrote:
> On Tue, Feb 06, 2024 at 10:40:43PM +0530, Manivannan Sadhasivam wrote:
> > ...
>
> > ... And for your usecase, allowing the controller driver to start
> > the link post boot just because a device on your Pixel phone comes
> > up later is not a good argument. You _should_not_ define the
> > behavior of a controller driver based on one platform, it is really
> > a bad design.
>
> I haven't followed the entire discussion, and I don't know much about
> the specifics of Ajay's situation, but from the controller driver's
> point of view, shouldn't a device coming up later look like a normal
> hot-add?
>
Yes, but most of the form factors that these drivers work with do not support
native hotplug. So users have to rescan the bus through sysfs.
> I think most drivers are designed with the assumption that Endpoints
> are present and powered up at the time of host controller probe, which
> seems a little stronger than necessary.
>
Most of the drivers work with endpoints that are fixed in the board design (like
M.2), so the endpoints would be up when the controller probes.
> I think the host controller probe should initialize the Root Port such
> that its LTSSM enters the Detect state, and that much should be
> basically straight-line code with no waiting. If no Endpoint is
> attached, i.e., "the slot is empty", it would be nice if the probe
> could then complete immediately without waiting at all.
>
Atleast on Qcom platforms, the LTSSM would be in "Detect" state even if no
endpoints are found during probe. Then once an endpoint comes up later, link
training happens and user can rescan the bus through sysfs.
But, I don't know the real need of 1s loop to wait for the link. It predates my
work on DWC drivers. Maybe Lorenzo could shed some light. I could not find the
reference in both DWC and PCIe specs (maybe my grep was bad).
> If the link comes up later, could we handle it as a hot-add? This
> might be an actual hot-add, or it might be that an Endpoint was
> present at boot but link training didn't complete until later.
>
> I admit it doesn't look trivial to actually implement this. We would
> need to be able to detect link-up events, e.g., via hotplug or other
> link management interrupts. Lacking that hardware functionality, we
> might need driver-specific code to wait for the link to come up
> (possibly drivers could skip the wait if they can detect the "slot
> empty" case).
>
> Also, the hotplug functionality (pciehp or acpiphp) is currently
> initialized later and there's probably a race with enabling and
> detecting hot-add events in the "slot occupied" case.
>
As I mentioned above, hotplug is not possible in all the cases. There is a
series floating to add GPIO based hotplug, but still that requires board
designers to route a dedicated GPIO to the endpoint.
To conclude, we do need to check for the existence of the endpoints during
probe. But whether the driver should wait for 1s for the link to come up,
should be clarified by Lorenzo.
- Mani
--
மணிவண்ணன் சதாசிவம்
next prev parent reply other threads:[~2024-02-15 14:09 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-12 9:30 [PATCH v5] PCI: dwc: Wait for link up only if link is started Ajay Agarwal
2024-01-18 18:15 ` Ajay Agarwal
2024-01-19 7:52 ` Manivannan Sadhasivam
2024-01-19 17:59 ` Ajay Agarwal
2024-01-20 14:34 ` Manivannan Sadhasivam
2024-01-29 6:51 ` Ajay Agarwal
2024-01-29 7:10 ` Manivannan Sadhasivam
2024-01-29 8:04 ` Ajay Agarwal
2024-01-29 8:12 ` Manivannan Sadhasivam
2024-01-29 13:26 ` Ajay Agarwal
2024-01-30 6:45 ` Manivannan Sadhasivam
2024-01-30 9:00 ` Ajay Agarwal
2024-01-30 12:29 ` Manivannan Sadhasivam
2024-01-30 17:18 ` Ajay Agarwal
2024-01-30 18:36 ` Manivannan Sadhasivam
2024-02-05 11:00 ` Ajay Agarwal
2024-02-06 17:10 ` Manivannan Sadhasivam
2024-02-14 22:02 ` Bjorn Helgaas
2024-02-15 14:09 ` Manivannan Sadhasivam [this message]
2024-02-17 0:07 ` Bjorn Helgaas
2024-02-19 14:13 ` Manivannan Sadhasivam
2024-02-22 4:30 ` Ajay Agarwal
2024-02-28 2:55 ` Ajay Agarwal
2024-02-20 17:34 ` Ajay Agarwal
2024-02-28 17:29 ` Manivannan Sadhasivam
2024-03-06 12:00 ` Ajay Agarwal
2024-03-10 13:51 ` Manivannan Sadhasivam
2025-02-14 9:15 ` Ajay Agarwal
2025-02-14 9:18 ` Johan Hovold
2025-02-14 9:42 ` Manivannan Sadhasivam
2025-02-14 10:02 ` Ajay Agarwal
2025-02-14 13:39 ` Manivannan Sadhasivam
2025-02-14 18:38 ` William McVicker
2025-02-19 17:46 ` Manivannan Sadhasivam
2024-01-31 23:48 ` Bjorn Helgaas
2024-02-01 3:14 ` Bjorn Helgaas
2024-02-01 7:32 ` Manivannan Sadhasivam
2024-02-01 8:37 ` Lei Chuan Hua
2024-01-19 20:42 ` Bjorn Helgaas
2024-01-24 9:24 ` Ajay Agarwal
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