From: Bjorn Helgaas <helgaas@kernel.org>
To: Ben Cheatham <Benjamin.Cheatham@amd.com>
Cc: linux-cxl@vger.kernel.org, linux-pci@vger.kernel.org,
dave@stgolabs.net, jonathan.cameron@huawei.com,
dave.jiang@intel.com, alison.schofield@intel.com,
vishal.l.verma@intel.com, ira.weiny@intel.com,
dan.j.williams@intel.com, bhelgaas@google.com
Subject: Re: [RFC PATCH 4/6] pcie/cxl_timeout: Add CXL.mem error isolation support
Date: Thu, 15 Feb 2024 15:49:21 -0600 [thread overview]
Message-ID: <20240215214921.GA1310551@bhelgaas> (raw)
In-Reply-To: <20240215194048.141411-5-Benjamin.Cheatham@amd.com>
On Thu, Feb 15, 2024 at 01:40:46PM -0600, Ben Cheatham wrote:
> Add and enable CXL.mem error isolation support (CXL 3.0 12.3.2)
> to the CXL Timeout & Isolation service driver.
> @@ -341,7 +366,8 @@ static int cxl_timeout_probe(struct pcie_device *dev)
> struct pci_dev *port = dev->port;
> struct pcie_cxlt_data *pdata;
> struct cxl_timeout *cxlt;
> - int rc = 0;
> + bool timeout_enabled;
> + int rc;
>
> /* Limit to CXL root ports */
> if (!pci_find_dvsec_capability(port, PCI_DVSEC_VENDOR_ID_CXL,
> @@ -360,6 +386,18 @@ static int cxl_timeout_probe(struct pcie_device *dev)
> pci_dbg(dev->port, "Failed to enable CXL.mem timeout: %d\n",
> rc);
>
> + timeout_enabled = !rc;
This ends up being a little weird: mixing int and bool, negating rc
here and then negating timeout_enabled later, several messages.
Maybe could just keep rc1 and rc2, drop the pci_dbg messages and
enhance the "enabled" message to be something like:
"enabled %s%s with IRQ", rc1 ? "" : "timeout", rc2 ? "" : "isolation"
("&" left for your imagination).
Or something like
#define FLAG(x) ((x) ? '-' : '+')
"CXL.mem timeout%c isolation%c enabled with IRQ %d", FLAG(rc1), FLAG(rc2)
> + rc = cxl_enable_isolation(dev, cxlt);
> + if (rc)
> + pci_dbg(dev->port, "Failed to enable CXL.mem isolation: %d\n",
> + rc);
"(%pe)"
> + if (rc && !timeout_enabled) {
> + pci_info(dev->port,
> + "Failed to enable CXL.mem timeout and isolation.\n");
Most messages don't include a period at end. It just adds the chance
for line wrapping unnecessarily.
next prev parent reply other threads:[~2024-02-15 21:49 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-15 19:40 [RFC PATCH 0/6] Implement initial CXL Timeout & Isolation support Ben Cheatham
2024-02-15 19:40 ` [RFC PATCH 1/6] cxl/core: Add CXL Timeout & Isolation capability parsing Ben Cheatham
2024-02-15 19:40 ` [RFC PATCH 2/6] pcie/cxl_timeout: Add CXL Timeout & Isolation service driver Ben Cheatham
2024-02-15 21:13 ` Bjorn Helgaas
2024-02-15 22:21 ` Ben Cheatham
2024-02-15 22:26 ` Bjorn Helgaas
2024-02-15 19:40 ` [RFC PATCH 3/6] pcie/cxl_timeout: Add CXL.mem timeout range programming Ben Cheatham
2024-02-15 21:35 ` Bjorn Helgaas
2024-02-15 22:21 ` Ben Cheatham
2024-02-15 22:29 ` Bjorn Helgaas
2024-02-15 22:30 ` Ben Cheatham
2024-02-15 19:40 ` [RFC PATCH 4/6] pcie/cxl_timeout: Add CXL.mem error isolation support Ben Cheatham
2024-02-15 21:49 ` Bjorn Helgaas [this message]
2024-02-15 22:21 ` Ben Cheatham
2024-02-15 19:40 ` [RFC PATCH 5/6] pcie/portdrv: Add CXL MSI/-X allocation Ben Cheatham
2024-02-15 21:51 ` Bjorn Helgaas
2024-02-15 22:22 ` Ben Cheatham
2024-02-15 19:40 ` [RFC PATCH 6/6] pcie/cxl_timeout: Add CXL.mem Timeout & Isolation interrupt support Ben Cheatham
2024-02-15 21:57 ` Bjorn Helgaas
2024-02-15 22:22 ` Ben Cheatham
2024-02-15 23:43 ` [RFC PATCH 0/6] Implement initial CXL Timeout & Isolation support Dan Williams
2024-03-25 15:15 ` Ben Cheatham
2024-03-25 15:54 ` Dan Williams
2024-04-01 19:41 ` Ben Cheatham
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