[PATCH 1/1] PCI: Use the correct bit in Link Training not active check

["Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>]

Besides Link Training bit, pcie_retrain_link() can also be asked to
wait for Data Link Layer Link Active bit (PCIe r6.1 sec 7.5.3.8) using
'use_lt' parameter since the merge commit 1abb47390350 ("Merge branch
'pci/enumeration'").

pcie_retrain_link() first tries to ensure Link Training is not
currently active (see Implementation Note in PCIe r6.1 sec 7.5.3.7)
which must always check Link Training bit regardless of 'use_lt'.
Correct the pcie_wait_for_link_status() parameters to only wait for
the correct bit to ensure there is no ongoing Link Training.

Since waiting for Data Link Layer Link Active bit is only used for the
Target Speed quirk, this only impacts the case when the quirk attempts
to restore speed to higher than 2.5 GT/s (The link is Up at that point
so pcie_retrain_link() will fail).

Fixes: 1abb47390350 ("Merge branch 'pci/enumeration'")
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
---
 drivers/pci/pci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index d8f11a078924..251a0c66c8cb 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -5016,7 +5016,7 @@ int pcie_retrain_link(struct pci_dev *pdev, bool use_lt)
 	 * avoid LTSSM race as recommended in Implementation Note at the
 	 * end of PCIe r6.0.1 sec 7.5.3.7.
 	 */
-	rc = pcie_wait_for_link_status(pdev, use_lt, !use_lt);
+	rc = pcie_wait_for_link_status(pdev, true, false);
 	if (rc)
 		return rc;
 
-- 
2.39.2