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charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20240307111520.3303774-1-cassel@kernel.org> On Thu, Mar 07, 2024 at 12:15:20PM +0100, Niklas Cassel wrote: > The commit message in commit fc9a77040b04 ("PCI: designware-ep: Configure > Resizable BAR cap to advertise the smallest size") claims that it modifies > the Resizable BAR capability to only advertise support for 1 MB size BARs. > > However, the commit writes all zeroes to PCI_REBAR_CAP (the register which > contains the possible BAR sizes that a BAR be resized to). > > According to the spec, it is illegal to not have a bit set in > PCI_REBAR_CAP, and 1 MB is the smallest size allowed. > > Set bit 4 in PCI_REBAR_CAP, so that we actually advertise support for a > 1 MB BAR size. > > Before: > Capabilities: [2e8 v1] Physical Resizable BAR > BAR 0: current size: 1MB > BAR 1: current size: 1MB > BAR 2: current size: 1MB > BAR 3: current size: 1MB > BAR 4: current size: 1MB > BAR 5: current size: 1MB > After: > Capabilities: [2e8 v1] Physical Resizable BAR > BAR 0: current size: 1MB, supported: 1MB > BAR 1: current size: 1MB, supported: 1MB > BAR 2: current size: 1MB, supported: 1MB > BAR 3: current size: 1MB, supported: 1MB > BAR 4: current size: 1MB, supported: 1MB > BAR 5: current size: 1MB, supported: 1MB > > Fixes: fc9a77040b04 ("PCI: designware-ep: Configure Resizable BAR cap to advertise the smallest size") > Signed-off-by: Niklas Cassel If you happen to respin, please CC stable list. Otherwise, Lorenzo or Krzysztof could do it while applying. Cc: # 5.2 Reviewed-by: Manivannan Sadhasivam - Mani > --- > Changes since v1: > -Fix spelling of advertise (Bjorn). > -Add lspci output to highlight the problem (Bjorn). > -Add specific section and version when referring to the PCIe spec (Bjorn). > > drivers/pci/controller/dwc/pcie-designware-ep.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c > index 9a437cfce073..746a11dcb67f 100644 > --- a/drivers/pci/controller/dwc/pcie-designware-ep.c > +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c > @@ -629,8 +629,13 @@ int dw_pcie_ep_init_complete(struct dw_pcie_ep *ep) > nbars = (reg & PCI_REBAR_CTRL_NBAR_MASK) >> > PCI_REBAR_CTRL_NBAR_SHIFT; > > + /* > + * PCIe r6.0, sec 7.8.6.2 require us to support at least one > + * size in the range from 1 MB to 512 GB. Advertise support > + * for 1 MB BAR size only. > + */ > for (i = 0; i < nbars; i++, offset += PCI_REBAR_CTRL) > - dw_pcie_writel_dbi(pci, offset + PCI_REBAR_CAP, 0x0); > + dw_pcie_writel_dbi(pci, offset + PCI_REBAR_CAP, BIT(4)); > } > > /* > -- > 2.44.0 > -- மணிவண்ணன் சதாசிவம்