Re: [PATCH 0/3] PCI: Add Secondary Bus Reset (SBR) support for CXL

Lukas Wunner
2024-03-12T07:51:35Z

On Mon, Mar 11, 2024 at 01:39:52PM -0700, Dave Jiang wrote:
> Patch 1:
> Add check to PCI bus_reset path for CXL device and return with error if "Unmask
> SBR" bit is set to 0. This allows user to realize that SBR is masked for this
> CXL device. However, if the user sets the "Unmask SBR" bit via a tool such as
> setpci, then the bus_reset will proceed.

So is the point of patch 1 only to inform the user that the SBR has
no effect? Or does the SBR have any negative side effects that you
want to avoid (e.g. due to the config space save/restore)?

If you only want to inform the user, then this functionality could
live in a ->reset_prepare() callback exposed by the cxl subsystem
and the pci subsystem wouldn't have to be touched at all.

Thanks,

Lukas