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charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20240313105804.100168-9-cassel@kernel.org> On Wed, Mar 13, 2024 at 11:58:00AM +0100, Niklas Cassel wrote: > Ever since commit f25b5fae29d4 ("PCI: endpoint: Setting a BAR size > 4 GB > is invalid if 64-bit flag is not set") it has been impossible to get the > .set_bar() callback with a BAR size > 4 GB, if the BAR was also not > requested to be configured as a 64-bit BAR. > > It is however possible that an EPF driver configures a BAR as 64-bit, > even if the requested size is < 4 GB. 2 GB > > Respect the requested BAR configuration, just like how it is already > repected with regards to the prefetchable bit. > > Signed-off-by: Niklas Cassel Ah, I missed this one. But the same comment as previous one applies to this patch also. Reviewed-by: Manivannan Sadhasivam - Mani > --- > drivers/pci/controller/pcie-rockchip-ep.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c > index c9046e97a1d2..57472cf48997 100644 > --- a/drivers/pci/controller/pcie-rockchip-ep.c > +++ b/drivers/pci/controller/pcie-rockchip-ep.c > @@ -153,7 +153,7 @@ static int rockchip_pcie_ep_set_bar(struct pci_epc *epc, u8 fn, u8 vfn, > ctrl = ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_IO_32BITS; > } else { > bool is_prefetch = !!(flags & PCI_BASE_ADDRESS_MEM_PREFETCH); > - bool is_64bits = sz > SZ_2G; > + bool is_64bits = !!(flags & PCI_BASE_ADDRESS_MEM_TYPE_64); > > if (is_64bits && (bar & 1)) > return -EINVAL; > -- > 2.44.0 > -- மணிவண்ணன் சதாசிவம்