Re: [PATCH AUTOSEL 6.6 52/75] PCI: Mark LSI FW643 to avoid bus reset

[Bjorn Helgaas <helgaas@kernel.org>]

On Fri, Mar 29, 2024 at 08:42:33AM -0400, Sasha Levin wrote:
> From: Edmund Raile <edmund.raile@proton.me>
> 
> [ Upstream commit 29a43dc130ce65d365a8ea9e1cc4bc51005a353e ]
> 
> Apparently the LSI / Agere FW643 can't recover after a Secondary Bus Reset
> and requires a power-off or suspend/resume and rescan.
> 
> VFIO resets a device before assigning it to a VM, and the FW643 doesn't
> support any other reset methods, so this problem prevented assignment of
> FW643 to VMs.
> 
> Prevent use of Secondary Bus Reset for this device.
> 
> With this change, the FW643 can be assigned to VMs with VFIO.  Note that it
> will not be reset, resulting in leaking state between VMs and host.
> 
> Link: https://lore.kernel.org/r/20240227131401.17913-1-edmund.raile@proton.me
> Signed-off-by: Edmund Raile <edmund.raile@proton.me>
> [bhelgaas: commit log, comment]
> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
> Signed-off-by: Sasha Levin <sashal@kernel.org>

We're about to revert this upstream, so I wouldn't backport this to
any stable trees:

https://lore.kernel.org/r/20240328212302.1582483-1-helgaas@kernel.org

> ---
>  drivers/pci/quirks.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index b5b96d2a9f4ba..687f9b00b3057 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -3758,6 +3758,14 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003e, quirk_no_bus_reset);
>   */
>  DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CAVIUM, 0xa100, quirk_no_bus_reset);
>  
> +/*
> + * Apparently the LSI / Agere FW643 can't recover after a Secondary Bus
> + * Reset and requires a power-off or suspend/resume and rescan.  Prevent
> + * use of that reset.
> + */
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATT, 0x5900, quirk_no_bus_reset);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATT, 0x5901, quirk_no_bus_reset);
> +
>  /*
>   * Some TI KeyStone C667X devices do not support bus/hot reset.  The PCIESS
>   * automatically disables LTSSM when Secondary Bus Reset is received and
> -- 
> 2.43.0
>