From: Alexandru Gagniuc <mr.nuke.me@gmail.com>
To: "Bjorn Andersson" <andersson@kernel.org>,
"Konrad Dybcio" <konrad.dybcio@linaro.org>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>
Cc: ansuelsmth@gmail.com, robimarko@gmail.com,
Alexandru Gagniuc <mr.nuke.me@gmail.com>,
linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 4/7] PCI: qcom: Add support for IPQ9574
Date: Tue, 2 Apr 2024 14:25:52 -0500 [thread overview]
Message-ID: <20240402192555.1955204-4-mr.nuke.me@gmail.com> (raw)
In-Reply-To: <20240402192555.1955204-1-mr.nuke.me@gmail.com>
Add support for the PCIe on IPQ9574. The main difference from ipq6018
is that the "iface" clock is not necessarry. Add a special case in
qcom_pcie_get_resources_2_9_0() to handle this.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
---
drivers/pci/controller/dwc/pcie-qcom.c | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
index 14772edcf0d3..10560d6d6336 100644
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -1101,15 +1101,19 @@ static int qcom_pcie_get_resources_2_9_0(struct qcom_pcie *pcie)
struct qcom_pcie_resources_2_9_0 *res = &pcie->res.v2_9_0;
struct dw_pcie *pci = pcie->pci;
struct device *dev = pci->dev;
- int ret;
+ int ret, num_clks = ARRAY_SIZE(res->clks) - 1;
- res->clks[0].id = "iface";
+ res->clks[0].id = "rchng";
res->clks[1].id = "axi_m";
res->clks[2].id = "axi_s";
res->clks[3].id = "axi_bridge";
- res->clks[4].id = "rchng";
- ret = devm_clk_bulk_get(dev, ARRAY_SIZE(res->clks), res->clks);
+ if (!of_device_is_compatible(dev->of_node, "qcom,pcie-ipq9574")) {
+ res->clks[4].id = "iface";
+ num_clks++;
+ }
+
+ ret = devm_clk_bulk_get(dev, num_clks, res->clks);
if (ret < 0)
return ret;
@@ -1664,6 +1668,7 @@ static const struct of_device_id qcom_pcie_match[] = {
{ .compatible = "qcom,pcie-ipq8064-v2", .data = &cfg_2_1_0 },
{ .compatible = "qcom,pcie-ipq8074", .data = &cfg_2_3_3 },
{ .compatible = "qcom,pcie-ipq8074-gen3", .data = &cfg_2_9_0 },
+ { .compatible = "qcom,pcie-ipq9574", .data = &cfg_2_9_0 },
{ .compatible = "qcom,pcie-msm8996", .data = &cfg_2_3_2 },
{ .compatible = "qcom,pcie-qcs404", .data = &cfg_2_4_0 },
{ .compatible = "qcom,pcie-sa8540p", .data = &cfg_sc8280xp },
--
2.40.1
prev parent reply other threads:[~2024-04-02 19:26 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20240402192555.1955204-1-mr.nuke.me@gmail.com>
2024-04-02 19:25 ` [PATCH 3/7] dt-bindings: PCI: qcom: Add IPQ9574 PCIe controller Alexandru Gagniuc
2024-04-03 7:14 ` Krzysztof Kozlowski
2024-04-03 18:05 ` mr.nuke.me
2024-04-04 6:18 ` Krzysztof Kozlowski
2024-04-02 19:25 ` Alexandru Gagniuc [this message]
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