From: Sean Anderson <sean.anderson@linux.dev>
To: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
linux-pci@vger.kernel.org
Cc: Michal Simek <michal.simek@amd.com>,
Thippeswamy Havalige <thippeswamy.havalige@amd.com>,
linux-arm-kernel@lists.infradead.org,
Bjorn Helgaas <bhelgaas@google.com>,
linux-kernel@vger.kernel.org,
Sean Anderson <sean.anderson@linux.dev>
Subject: [PATCH v3 7/7] arm64: zynqmp: Add PCIe phys
Date: Mon, 20 May 2024 10:54:02 -0400 [thread overview]
Message-ID: <20240520145402.2526481-8-sean.anderson@linux.dev> (raw)
In-Reply-To: <20240520145402.2526481-1-sean.anderson@linux.dev>
Add PCIe phy bindings for the ZCU102.
Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
Tested-by: thippeswamy.havalige@amd.com
---
(no changes since v2)
Changes in v2:
- Remove phy-names
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
index ad8f23a0ec67..d2175f3dd099 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
@@ -941,6 +941,7 @@ conf-pull-none {
&pcie {
status = "okay";
+ phys = <&psgtr 0 PHY_TYPE_PCIE 0 0>;
};
&psgtr {
--
2.35.1.1320.gc452695387.dirty
prev parent reply other threads:[~2024-05-20 14:54 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-20 14:53 [PATCH v3 0/7] PCI: xilinx-nwl: Add phy support Sean Anderson
2024-05-20 14:53 ` [PATCH v3 1/7] dt-bindings: pci: xilinx-nwl: Add phys Sean Anderson
2024-05-22 14:46 ` Rob Herring (Arm)
2024-05-22 22:28 ` Bjorn Helgaas
2024-05-23 15:19 ` Sean Anderson
2024-05-20 14:53 ` [PATCH v3 2/7] PCI: xilinx-nwl: Fix off-by-one in IRQ handler Sean Anderson
2024-05-22 22:28 ` Bjorn Helgaas
2024-05-23 15:21 ` Sean Anderson
2024-05-24 14:56 ` Dan Carpenter
2024-05-24 15:03 ` Sean Anderson
2024-05-20 14:53 ` [PATCH v3 3/7] PCI: xilinx-nwl: Fix register misspelling Sean Anderson
2024-05-20 14:53 ` [PATCH v3 4/7] PCI: xilinx-nwl: Rate-limit misc interrupt messages Sean Anderson
2024-05-20 14:54 ` [PATCH v3 5/7] PCI: xilinx-nwl: Clean up clock on probe failure/removal Sean Anderson
2024-05-23 19:18 ` Markus Elfring
2024-05-23 19:21 ` Sean Anderson
2024-05-23 20:11 ` Markus Elfring
2024-05-23 20:18 ` Sean Anderson
2024-05-20 14:54 ` [PATCH v3 6/7] PCI: xilinx-nwl: Add phy support Sean Anderson
2024-05-24 8:16 ` Markus Elfring
2024-05-24 14:38 ` Sean Anderson
2024-05-24 15:35 ` Markus Elfring
2024-05-24 14:59 ` Dan Carpenter
2024-05-24 15:24 ` Sean Anderson
2024-05-20 14:54 ` Sean Anderson [this message]
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