Re: [PATCH v1 5/5] riscv: dts: microchip: add an initial devicetree for the BeagleV Fire

Conor Dooley
2024-05-28T11:57:58Z

[-- Attachment #1: Type: text/plain, Size: 1570 bytes --]

On Wed, Mar 27, 2024 at 12:24:40PM +0000, Conor Dooley wrote:

> + fabric-pcie-bus@3000000000 {
> + compatible = "simple-bus";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges = <0x0 0x40000000 0x0 0x40000000 0x0 0x20000000>,
> + <0x30 0x0 0x30 0x0 0x10 0x0>;
> +
> + pcie: pcie@3000000000 {
> + compatible = "microchip,pcie-host-1.0";
> + #address-cells = <0x3>;
> + #interrupt-cells = <0x1>;
> + #size-cells = <0x2>;
> + device_type = "pci";
> + reg = <0x30 0x0 0x0 0x8000000>,
> + <0x0 0x43000000 0x0 0x10000>;

So this ain't right, I sent some patches yesterday to sort out accessing
instance 2:
https://lore.kernel.org/all/20240527-slather-backfire-db4605ae7cd7@wendy/

> + reg-names = "cfg", "apb";
> + bus-range = <0x0 0x7f>;
> + interrupt-parent = <&plic>;
> + interrupts = <119>;
> + interrupt-map = <0 0 0 1 &pcie_intc 0>,
> + <0 0 0 2 &pcie_intc 1>,
> + <0 0 0 3 &pcie_intc 2>,
> + <0 0 0 4 &pcie_intc 3>;
> + interrupt-map-mask = <0 0 0 7>;
> + clocks = <&ccc_nw CLK_CCC_PLL0_OUT1>,
> + <&ccc_nw CLK_CCC_PLL0_OUT3>;
> + clock-names = "fic1", "fic3";
> + ranges = <0x43000000 0x0 0x9000000 0x30 0x9000000 0x0 0xf000000>,
> + <0x1000000 0x0 0x8000000 0x30 0x8000000 0x0 0x1000000>,
> + <0x3000000 0x0 0x18000000 0x30 0x18000000 0x0 0x70000000>;
> + msi-parent = <&pcie>;
> + msi-controller;
> + status = "disabled";
> +
> + pcie_intc: interrupt-controller {
> + #address-cells = <0>;
> + #interrupt-cells = <1>;
> + interrupt-controller;
> + };
> + };
> + };

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]