From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Frank Li <Frank.Li@nxp.com>
Cc: "Richard Zhu" <hongxing.zhu@nxp.com>,
"Lucas Stach" <l.stach@pengutronix.de>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Shawn Guo" <shawnguo@kernel.org>,
"Sascha Hauer" <s.hauer@pengutronix.de>,
"Pengutronix Kernel Team" <kernel@pengutronix.de>,
"Fabio Estevam" <festevam@gmail.com>,
"NXP Linux Team" <linux-imx@nxp.com>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Liam Girdwood" <lgirdwood@gmail.com>,
"Mark Brown" <broonie@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Conor Dooley" <conor+dt@kernel.org>,
linux-pci@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, bpf@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH v7 09/10] PCI: imx6: Call common PHY API to set mode, speed, and submode
Date: Sun, 21 Jul 2024 13:37:35 +0530 [thread overview]
Message-ID: <20240721080735.GF1908@thinkpad> (raw)
In-Reply-To: <20240708-pci2_upstream-v7-9-ac00b8174f89@nxp.com>
On Mon, Jul 08, 2024 at 01:08:13PM -0400, Frank Li wrote:
> Invoke the common PHY API to configure mode, speed, and submode. While
> these functions are optional in the PHY interface, they are necessary for
> certain PHY drivers. Lack of support for these functions in a PHY driver
> does not cause harm.
>
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
I've mentioned an issue below which is unrelated to this patch, but please do
fix it (in a separate patch).
> ---
> drivers/pci/controller/dwc/pci-imx6.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index 57814a0cfab8c..c72c7a0b0e02d 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -29,6 +29,7 @@
> #include <linux/types.h>
> #include <linux/interrupt.h>
> #include <linux/reset.h>
> +#include <linux/phy/pcie.h>
> #include <linux/phy/phy.h>
> #include <linux/pm_domain.h>
> #include <linux/pm_runtime.h>
> @@ -229,6 +230,10 @@ static void imx_pcie_configure_type(struct imx_pcie *imx_pcie)
>
> id = imx_pcie->controller_id;
>
> + /* If mode_mask is 0, then generic PHY driver is used to set the mode */
> + if (!drvdata->mode_mask[0])
> + return;
> +
> /* If mode_mask[id] is zero, means each controller have its individual gpr */
> if (!drvdata->mode_mask[id])
> id = 0;
> @@ -807,7 +812,11 @@ static void imx_pcie_ltssm_enable(struct device *dev)
> {
> struct imx_pcie *imx_pcie = dev_get_drvdata(dev);
> const struct imx_pcie_drvdata *drvdata = imx_pcie->drvdata;
> + u8 offset = dw_pcie_find_capability(imx_pcie->pci, PCI_CAP_ID_EXP);
> + u32 tmp;
>
> + tmp = dw_pcie_readl_dbi(imx_pcie->pci, offset + PCI_EXP_LNKCAP);
> + phy_set_speed(imx_pcie->phy, FIELD_GET(PCI_EXP_LNKCAP_SLS, tmp));
> if (drvdata->ltssm_mask)
> regmap_update_bits(imx_pcie->iomuxc_gpr, drvdata->ltssm_off, drvdata->ltssm_mask,
> drvdata->ltssm_mask);
> @@ -820,6 +829,7 @@ static void imx_pcie_ltssm_disable(struct device *dev)
> struct imx_pcie *imx_pcie = dev_get_drvdata(dev);
> const struct imx_pcie_drvdata *drvdata = imx_pcie->drvdata;
>
> + phy_set_speed(imx_pcie->phy, 0);
> if (drvdata->ltssm_mask)
> regmap_update_bits(imx_pcie->iomuxc_gpr, drvdata->ltssm_off,
> drvdata->ltssm_mask, 0);
> @@ -955,6 +965,12 @@ static int imx_pcie_host_init(struct dw_pcie_rp *pp)
> goto err_clk_disable;
> }
>
> + ret = phy_set_mode_ext(imx_pcie->phy, PHY_MODE_PCIE, PHY_MODE_PCIE_RC);
> + if (ret) {
> + dev_err(dev, "unable to set PCIe PHY mode\n");
> + goto err_phy_off;
'err_phy_off' should power off the PHY, right? But this label is used to do
phy_exit() which is wrong. Please rename this label to err_phy_exit and also
use _this_ label to power off the PHY after the failures of phy_power_on().
Right now, PHY is never turned off in error path.
- Mani
--
மணிவண்ணன் சதாசிவம்
next prev parent reply other threads:[~2024-07-21 8:07 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-08 17:08 [PATCH v7 00/10] PCI: imx6: Fix\rename\clean up and add lut information for imx95 Frank Li
2024-07-08 17:08 ` [PATCH v7 01/10] PCI: imx6: Fix establish link failure in EP mode for iMX8MM and iMX8MP Frank Li
2024-07-08 17:08 ` [PATCH v7 02/10] PCI: imx6: Fix i.MX8MP PCIe EP's occasional failure to trigger MSI Frank Li
2024-07-21 7:39 ` Manivannan Sadhasivam
2024-07-08 17:08 ` [PATCH v7 03/10] PCI: imx6: Rename imx6_* with imx_* Frank Li
2024-07-08 17:08 ` [PATCH v7 04/10] PCI: imx6: Introduce SoC specific callbacks for controlling REFCLK Frank Li
2024-07-21 7:56 ` Manivannan Sadhasivam
2024-07-22 15:16 ` Frank Li
2024-07-24 17:16 ` Manivannan Sadhasivam
2024-07-08 17:08 ` [PATCH v7 05/10] PCI: imx6: Simplify switch-case logic by involve core_reset callback Frank Li
2024-07-08 17:08 ` [PATCH v7 06/10] PCI: imx6: Improve comment for workaround ERR010728 Frank Li
2024-07-21 7:57 ` Manivannan Sadhasivam
2024-07-08 17:08 ` [PATCH v7 07/10] PCI: imx6: Consolidate redundant if-checks Frank Li
2024-07-08 17:08 ` [PATCH v7 08/10] dt-bindings: imx6q-pcie: Add i.MX8Q pcie compatible string Frank Li
2024-07-21 7:58 ` Manivannan Sadhasivam
2024-07-08 17:08 ` [PATCH v7 09/10] PCI: imx6: Call common PHY API to set mode, speed, and submode Frank Li
2024-07-21 8:07 ` Manivannan Sadhasivam [this message]
2024-07-08 17:08 ` [PATCH v7 10/10] PCI: imx6: Add i.MX8Q PCIe root complex (RC) support Frank Li
2024-07-21 8:23 ` Manivannan Sadhasivam
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