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AJvYcCXVP2CexdwxVN1IkJKPNwSWsv+ZslbHb4q4AJ8+3V2vWDYY94ZNwz//H1m30ESQMniGhS27xukjaqLwuTwYa7VjZOl/veSLmGtK X-Gm-Message-State: AOJu0Yz79HmH8sQtAWuRk5NichUTEjHizlVEuJoAZ/Ldrh2XmXNcm5NM vYyiLdpUCdpQlwgE9Nb8zuvgeRaymScDPp6PXx0XNVcs+5ig4hGtRtwQJLNTvg== X-Google-Smtp-Source: AGHT+IHLS+82V8WDv+DxOBruh31E1ZQpXfA1aKcSS2KRnMcW++Iewr3PJOotonJexwj4BwLKmdHEvA== X-Received: by 2002:a17:902:d48f:b0:1f7:3a4:f66f with SMTP id d9443c01a7336-1fd7462125cmr50457945ad.43.1721549263981; Sun, 21 Jul 2024 01:07:43 -0700 (PDT) Received: from thinkpad ([120.56.206.118]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1fd6f42c879sm32576175ad.188.2024.07.21.01.07.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 21 Jul 2024 01:07:43 -0700 (PDT) Date: Sun, 21 Jul 2024 13:37:35 +0530 From: Manivannan Sadhasivam To: Frank Li Cc: Richard Zhu , Lucas Stach , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Philipp Zabel , Liam Girdwood , Mark Brown , Krzysztof Kozlowski , Conor Dooley , linux-pci@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, bpf@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v7 09/10] PCI: imx6: Call common PHY API to set mode, speed, and submode Message-ID: <20240721080735.GF1908@thinkpad> References: <20240708-pci2_upstream-v7-0-ac00b8174f89@nxp.com> <20240708-pci2_upstream-v7-9-ac00b8174f89@nxp.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20240708-pci2_upstream-v7-9-ac00b8174f89@nxp.com> On Mon, Jul 08, 2024 at 01:08:13PM -0400, Frank Li wrote: > Invoke the common PHY API to configure mode, speed, and submode. While > these functions are optional in the PHY interface, they are necessary for > certain PHY drivers. Lack of support for these functions in a PHY driver > does not cause harm. > > Signed-off-by: Frank Li Reviewed-by: Manivannan Sadhasivam I've mentioned an issue below which is unrelated to this patch, but please do fix it (in a separate patch). > --- > drivers/pci/controller/dwc/pci-imx6.c | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c > index 57814a0cfab8c..c72c7a0b0e02d 100644 > --- a/drivers/pci/controller/dwc/pci-imx6.c > +++ b/drivers/pci/controller/dwc/pci-imx6.c > @@ -29,6 +29,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -229,6 +230,10 @@ static void imx_pcie_configure_type(struct imx_pcie *imx_pcie) > > id = imx_pcie->controller_id; > > + /* If mode_mask is 0, then generic PHY driver is used to set the mode */ > + if (!drvdata->mode_mask[0]) > + return; > + > /* If mode_mask[id] is zero, means each controller have its individual gpr */ > if (!drvdata->mode_mask[id]) > id = 0; > @@ -807,7 +812,11 @@ static void imx_pcie_ltssm_enable(struct device *dev) > { > struct imx_pcie *imx_pcie = dev_get_drvdata(dev); > const struct imx_pcie_drvdata *drvdata = imx_pcie->drvdata; > + u8 offset = dw_pcie_find_capability(imx_pcie->pci, PCI_CAP_ID_EXP); > + u32 tmp; > > + tmp = dw_pcie_readl_dbi(imx_pcie->pci, offset + PCI_EXP_LNKCAP); > + phy_set_speed(imx_pcie->phy, FIELD_GET(PCI_EXP_LNKCAP_SLS, tmp)); > if (drvdata->ltssm_mask) > regmap_update_bits(imx_pcie->iomuxc_gpr, drvdata->ltssm_off, drvdata->ltssm_mask, > drvdata->ltssm_mask); > @@ -820,6 +829,7 @@ static void imx_pcie_ltssm_disable(struct device *dev) > struct imx_pcie *imx_pcie = dev_get_drvdata(dev); > const struct imx_pcie_drvdata *drvdata = imx_pcie->drvdata; > > + phy_set_speed(imx_pcie->phy, 0); > if (drvdata->ltssm_mask) > regmap_update_bits(imx_pcie->iomuxc_gpr, drvdata->ltssm_off, > drvdata->ltssm_mask, 0); > @@ -955,6 +965,12 @@ static int imx_pcie_host_init(struct dw_pcie_rp *pp) > goto err_clk_disable; > } > > + ret = phy_set_mode_ext(imx_pcie->phy, PHY_MODE_PCIE, PHY_MODE_PCIE_RC); > + if (ret) { > + dev_err(dev, "unable to set PCIe PHY mode\n"); > + goto err_phy_off; 'err_phy_off' should power off the PHY, right? But this label is used to do phy_exit() which is wrong. Please rename this label to err_phy_exit and also use _this_ label to power off the PHY after the failures of phy_power_on(). Right now, PHY is never turned off in error path. - Mani -- மணிவண்ணன் சதாசிவம்