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From: Bjorn Helgaas <helgaas@kernel.org>
To: Shradha Todi <shradha.t@samsung.com>
Cc: linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	manivannan.sadhasivam@linaro.org, lpieralisi@kernel.org,
	kw@linux.com, robh@kernel.org, bhelgaas@google.com,
	jingoohan1@gmail.com, fancer.lancer@gmail.com,
	yoshihiro.shimoda.uh@renesas.com, conor.dooley@microchip.com,
	pankaj.dubey@samsung.com, gost.dev@samsung.com
Subject: Re: [PATCH 2/3] PCI: debugfs: Add support for RASDES framework in DWC
Date: Fri, 26 Jul 2024 12:41:23 -0500	[thread overview]
Message-ID: <20240726174123.GA907125@bhelgaas> (raw)
In-Reply-To: <20240625093813.112555-3-shradha.t@samsung.com>

Based on the files touched, this looks DWC-specific, so the subject
prefix should be "PCI: dwc: ", not the very generic "debugfs".
The "debugfs" part could go later, e.g.,

  PCI: dwc: Add RASDES debugfs support

On Tue, Jun 25, 2024 at 03:08:12PM +0530, Shradha Todi wrote:
> Add support to use the RASDES feature of DesignWare PCIe controller
> using debugfs entries.
> 
> RASDES is a vendor specific extended PCIe capability which reads the
> current hardware internal state of PCIe device. Following primary
> features are provided to userspace via debugfs:
> - Debug registers
> - Error injection
> - Statistical counters

This looks like great stuff, thanks a lot for implementing this!

I think this debugfs structure and functionality should be documented
somewhere like Documentation/ABI/testing/.  This functionality is
likely to be used by userspace tools like perf that will depend on
this ABI.  (Oh, sorry, I just saw Jonathan's similar comment, didn't
mean to duplicate it.)

I don't expect other vendors to implement exactly the same
functionality, but we can at least try to use similar structure if
they do.

> +config PCIE_DW_DEBUGFS
> +	bool "DWC PCIe debugfs entries"
> +	help
> +	  Enables debugfs entries for the DWC PCIe Controller.
> +	  These entries make use of the RAS features in the DW
> +	  controller to help in debug, error injection and statistical
> +	  counters

> +int dwc_pcie_rasdes_debugfs_init(struct dw_pcie *pci)
> +{
> +	struct device *dev = pci->dev;
> +	int ras_cap;
> +	struct rasdes_info *dump_info;
> +	char dirname[DWC_DEBUGFS_MAX];
> +	struct dentry *dir, *rasdes_debug, *rasdes_err_inj;
> +	struct dentry *rasdes_event_counter, *rasdes_events;
> +	int i;
> +	struct rasdes_priv *priv_tmp;
> +
> +	ras_cap = dw_pcie_find_vsec_capability(pci, DW_PCIE_RAS_DES_CAP);

Does this look at config space of a DWC Root Port, or is this in a
RCRB or similar?

Bjorn

  parent reply	other threads:[~2024-07-26 17:41 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20240625094434epcas5p2e48bda118809ccb841c983d737d4f09d@epcas5p2.samsung.com>
2024-06-25  9:38 ` [PATCH v3 0/3] Add support for RAS DES feature in PCIe DW Shradha Todi
     [not found]   ` <CGME20240625094438epcas5p2760f4d1537d86541940177543cea5aa8@epcas5p2.samsung.com>
2024-06-25  9:38     ` [PATCH 1/3] PCI: dwc: Add support for vendor specific capability search Shradha Todi
2024-07-01 10:55       ` Jonathan Cameron
2024-07-26 17:32       ` Bjorn Helgaas
     [not found]   ` <CGME20240625094443epcas5p3093ac786a7d0f09de5a3bba17bbd4458@epcas5p3.samsung.com>
2024-06-25  9:38     ` [PATCH 2/3] PCI: debugfs: Add support for RASDES framework in DWC Shradha Todi
2024-07-01 11:09       ` Jonathan Cameron
2024-07-19 12:12         ` Shradha Todi
2024-07-24 17:15       ` Manivannan Sadhasivam
2024-07-26 17:41       ` Bjorn Helgaas [this message]
     [not found]   ` <CGME20240625094446epcas5p4e5e864d5f56af0a44e950a426bc9f5f5@epcas5p4.samsung.com>
2024-06-25  9:38     ` [PATCH 3/3] PCI: dwc: Create debugfs files in DWC driver Shradha Todi
2024-07-01 11:10       ` Jonathan Cameron
2024-07-01 11:15   ` [PATCH v3 0/3] Add support for RAS DES feature in PCIe DW Jonathan Cameron
2024-11-26  5:16   ` Krishna Chaitanya Chundru
2024-11-26  5:17   ` Krishna Chaitanya Chundru
2024-11-26  7:15     ` Nitesh Gupta
2024-11-26 10:15       ` Shradha Todi

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