From: Frank Li <Frank.Li@nxp.com>
To: "Richard Zhu" <hongxing.zhu@nxp.com>,
"Lucas Stach" <l.stach@pengutronix.de>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Shawn Guo" <shawnguo@kernel.org>,
"Sascha Hauer" <s.hauer@pengutronix.de>,
"Pengutronix Kernel Team" <kernel@pengutronix.de>,
"Fabio Estevam" <festevam@gmail.com>,
"NXP Linux Team" <linux-imx@nxp.com>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Liam Girdwood" <lgirdwood@gmail.com>,
"Mark Brown" <broonie@kernel.org>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Conor Dooley" <conor+dt@kernel.org>
Cc: linux-pci@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, bpf@vger.kernel.org,
devicetree@vger.kernel.org, Frank Li <Frank.Li@nxp.com>
Subject: [PATCH v8 10/11] PCI: imx6: Call common PHY API to set mode, speed, and submode
Date: Mon, 29 Jul 2024 16:18:17 -0400 [thread overview]
Message-ID: <20240729-pci2_upstream-v8-10-b68ee5ef2b4d@nxp.com> (raw)
In-Reply-To: <20240729-pci2_upstream-v8-0-b68ee5ef2b4d@nxp.com>
Invoke the common PHY API to configure mode, speed, and submode. While
these functions are optional in the PHY interface, they are necessary for
certain PHY drivers. Lack of support for these functions in a PHY driver
does not cause harm.
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
drivers/pci/controller/dwc/pci-imx6.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index ccb7cdae32756..91aab0288fdcb 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -28,6 +28,7 @@
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/reset.h>
+#include <linux/phy/pcie.h>
#include <linux/phy/phy.h>
#include <linux/pm_domain.h>
#include <linux/pm_runtime.h>
@@ -227,6 +228,10 @@ static void imx_pcie_configure_type(struct imx_pcie *imx_pcie)
id = imx_pcie->controller_id;
+ /* If mode_mask is 0, then generic PHY driver is used to set the mode */
+ if (!drvdata->mode_mask[0])
+ return;
+
/* If mode_mask[id] is zero, means each controller have its individual gpr */
if (!drvdata->mode_mask[id])
id = 0;
@@ -802,7 +807,11 @@ static void imx_pcie_ltssm_enable(struct device *dev)
{
struct imx_pcie *imx_pcie = dev_get_drvdata(dev);
const struct imx_pcie_drvdata *drvdata = imx_pcie->drvdata;
+ u8 offset = dw_pcie_find_capability(imx_pcie->pci, PCI_CAP_ID_EXP);
+ u32 tmp;
+ tmp = dw_pcie_readl_dbi(imx_pcie->pci, offset + PCI_EXP_LNKCAP);
+ phy_set_speed(imx_pcie->phy, FIELD_GET(PCI_EXP_LNKCAP_SLS, tmp));
if (drvdata->ltssm_mask)
regmap_update_bits(imx_pcie->iomuxc_gpr, drvdata->ltssm_off, drvdata->ltssm_mask,
drvdata->ltssm_mask);
@@ -815,6 +824,7 @@ static void imx_pcie_ltssm_disable(struct device *dev)
struct imx_pcie *imx_pcie = dev_get_drvdata(dev);
const struct imx_pcie_drvdata *drvdata = imx_pcie->drvdata;
+ phy_set_speed(imx_pcie->phy, 0);
if (drvdata->ltssm_mask)
regmap_update_bits(imx_pcie->iomuxc_gpr, drvdata->ltssm_off,
drvdata->ltssm_mask, 0);
@@ -950,6 +960,12 @@ static int imx_pcie_host_init(struct dw_pcie_rp *pp)
goto err_clk_disable;
}
+ ret = phy_set_mode_ext(imx_pcie->phy, PHY_MODE_PCIE, PHY_MODE_PCIE_RC);
+ if (ret) {
+ dev_err(dev, "unable to set PCIe PHY mode\n");
+ goto err_phy_exit;
+ }
+
ret = phy_power_on(imx_pcie->phy);
if (ret) {
dev_err(dev, "waiting for PHY ready timeout!\n");
--
2.34.1
next prev parent reply other threads:[~2024-07-29 20:19 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-29 20:18 [PATCH v8 00/11] PCI: imx6: Fix\rename\clean up and add lut information for imx95 Frank Li
2024-07-29 20:18 ` [PATCH v8 01/11] PCI: imx6: Fix establish link failure in EP mode for iMX8MM and iMX8MP Frank Li
2024-09-02 20:59 ` Bjorn Helgaas
2024-09-02 22:57 ` Frank Li
2024-09-02 21:12 ` Bjorn Helgaas
2024-09-02 22:51 ` Frank Li
2024-09-02 22:59 ` Bjorn Helgaas
2024-07-29 20:18 ` [PATCH v8 02/11] PCI: imx6: Fix i.MX8MP PCIe EP's occasional failure to trigger MSI Frank Li
2024-07-29 20:18 ` [PATCH v8 03/11] PCI: imx6: Fix missing call to phy_power_off() in error handling Frank Li
2024-08-07 2:35 ` Manivannan Sadhasivam
2024-07-29 20:18 ` [PATCH v8 04/11] PCI: imx6: Rename imx6_* with imx_* Frank Li
2024-09-03 19:37 ` Bjorn Helgaas
2024-09-03 19:50 ` Frank Li
2024-07-29 20:18 ` [PATCH v8 05/11] PCI: imx6: Introduce SoC specific callbacks for controlling REFCLK Frank Li
2024-08-07 2:36 ` Manivannan Sadhasivam
2024-07-29 20:18 ` [PATCH v8 06/11] PCI: imx6: Simplify switch-case logic by involve core_reset callback Frank Li
2024-07-29 20:18 ` [PATCH v8 07/11] PCI: imx6: Improve comment for workaround ERR010728 Frank Li
2024-07-29 20:18 ` [PATCH v8 08/11] PCI: imx6: Consolidate redundant if-checks Frank Li
2024-07-29 20:18 ` [PATCH v8 09/11] dt-bindings: imx6q-pcie: Add i.MX8Q pcie compatible string Frank Li
2024-07-29 20:18 ` Frank Li [this message]
2024-07-29 20:18 ` [PATCH v8 11/11] PCI: imx6: Add i.MX8Q PCIe root complex (RC) support Frank Li
2024-09-03 1:49 ` Bjorn Helgaas
2024-09-03 20:35 ` Frank Li
2024-09-03 21:09 ` Bjorn Helgaas
2024-09-11 14:07 ` Bjorn Helgaas
2024-09-11 15:19 ` Frank Li
2024-09-11 16:33 ` Bjorn Helgaas
2024-09-11 18:07 ` Frank Li
2024-08-06 20:33 ` [PATCH v8 00/11] PCI: imx6: Fix\rename\clean up and add lut information for imx95 Frank Li
2024-08-07 2:38 ` Manivannan Sadhasivam
2024-08-15 14:56 ` Frank Li
2024-08-22 17:03 ` Frank Li
2024-08-29 21:25 ` Frank Li
2024-09-01 17:55 ` Krzysztof Wilczyński
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