From: matthew.gerlach@linux.intel.com
To: lpieralisi@kernel.org, kw@linux.com, robh@kernel.org,
bhelgaas@google.com, krzk+dt@kernel.org, conor+dt@kernel.org,
dinguyen@kernel.org, joyce.ooi@intel.com,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Subject: [PATCH 4/7] arm64: dts: agilex: add soc0 label
Date: Wed, 31 Jul 2024 09:39:43 -0500 [thread overview]
Message-ID: <20240731143946.3478057-5-matthew.gerlach@linux.intel.com> (raw)
In-Reply-To: <20240731143946.3478057-1-matthew.gerlach@linux.intel.com>
From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Add a label to the soc@0 device tree node.
Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
---
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
index 2a5eeb21da47..98e14b9b4228 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
@@ -149,7 +149,7 @@ usbphy0: usbphy {
compatible = "usb-nop-xceiv";
};
- soc@0 {
+ soc0: soc@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
--
2.34.1
next prev parent reply other threads:[~2024-07-31 14:41 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-31 14:39 [PATCH 0/7] Add PCIe Root Port support for Agilex family of chips matthew.gerlach
2024-07-31 14:39 ` [PATCH 1/7] dt-bindings: PCI: altera: Convert to YAML matthew.gerlach
2024-07-31 14:39 ` [PATCH 2/7] dt-bindings: PCI: altera: msi: " matthew.gerlach
2024-07-31 14:39 ` [PATCH 3/7] dt-bindings: PCI: altera: Add binding for Agilex matthew.gerlach
2024-08-06 17:01 ` Rob Herring (Arm)
2024-07-31 14:39 ` matthew.gerlach [this message]
2024-07-31 14:39 ` [PATCH 5/7] arm64: dts: agilex: add dtsi for PCIe Root Port matthew.gerlach
2024-08-07 23:03 ` matthew.gerlach
2024-07-31 14:39 ` [PATCH 6/7] arm64: dts: agilex: add dts enabling " matthew.gerlach
2024-07-31 14:39 ` [PATCH 7/7] pci: controller: pcie-altera: Add support for Agilex matthew.gerlach
2024-07-31 20:23 ` Bjorn Helgaas
2024-08-02 0:07 ` matthew.gerlach
2024-08-01 15:29 ` [PATCH 0/7] Add PCIe Root Port support for Agilex family of chips Rob Herring (Arm)
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