Re: [PATCH v2 1/7] dt-bindings: PCI: altera: Convert to YAML

[Rob Herring <robh@kernel.org>]

On Fri, Aug 09, 2024 at 10:12:07AM -0500, matthew.gerlach@linux.intel.com wrote:
> From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
> 
> Convert the device tree bindings for the Altera Root Port PCIe controller
> from text to YAML. Update the entries in the interrupt-map field to have
> the correct number of address cells for the interrupt parent.
> 
> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> v8:

v2 or v8 or ??? I'm confused and tools will be too.

>  - Precisely constrain the number of items for reg and reg-names properties.
>    Constrain maxItems to 2 for altr,pcie-root-port-1.0.
>    Constrain minItems to 3 for altr,pcie-root-port-2.0.
> 
> v7:
>  - Keep original example dts, but fix warnings of interrupt-map field.
> 
> v6:
>  - Fix dt_binding_check warnings by creating interrupt-controller subnode
>    and fixing interrupt-map.
>  - Updated filename in MAINTAINERS.
> 
> v5:
>  - add interrupt-controller #interrupt-cells to required field
>  - don't touch original example dts
> 
> v4:
>  - reorder reg-names to match original binding
>  - move reg and reg-names to top level with limits.
> 
> v3:
>  - Added years to copyright
>  - Correct order in file of allOf and unevaluatedProperties
>  - remove items: in compatible field
>  - fix reg and reg-names constraints
>  - replace deprecated pci-bus.yaml with pci-host-bridge.yaml
>  - fix entries in ranges property
>  - remove device_type from required
> 
> v2:
>  - Move allOf: to bottom of file, just like example-schema is showing
>  - add constraint for reg and reg-names
>  - remove unneeded device_type
>  - drop #address-cells and #size-cells
>  - change minItems to maxItems for interrupts:
>  - change msi-parent to just "msi-parent: true"
>  - cleaned up required:
>  - make subject consistent with other commits coverting to YAML
>  - s/overt/onvert/g
> ---
>  .../devicetree/bindings/pci/altera-pcie.txt   |  50 --------
>  .../bindings/pci/altr,pcie-root-port.yaml     | 114 ++++++++++++++++++
>  MAINTAINERS                                   |   2 +-
>  3 files changed, 115 insertions(+), 51 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/pci/altera-pcie.txt
>  create mode 100644 Documentation/devicetree/bindings/pci/altr,pcie-root-port.yaml
> 
> diff --git a/Documentation/devicetree/bindings/pci/altera-pcie.txt b/Documentation/devicetree/bindings/pci/altera-pcie.txt
> deleted file mode 100644
> index 816b244a221e..000000000000
> --- a/Documentation/devicetree/bindings/pci/altera-pcie.txt
> +++ /dev/null
> @@ -1,50 +0,0 @@
> -* Altera PCIe controller
> -
> -Required properties:
> -- compatible :	should contain "altr,pcie-root-port-1.0" or "altr,pcie-root-port-2.0"
> -- reg:		a list of physical base address and length for TXS and CRA.
> -		For "altr,pcie-root-port-2.0", additional HIP base address and length.
> -- reg-names:	must include the following entries:
> -		"Txs": TX slave port region
> -		"Cra": Control register access region
> -		"Hip": Hard IP region (if "altr,pcie-root-port-2.0")
> -- interrupts:	specifies the interrupt source of the parent interrupt
> -		controller.  The format of the interrupt specifier depends
> -		on the parent interrupt controller.
> -- device_type:	must be "pci"
> -- #address-cells:	set to <3>
> -- #size-cells:		set to <2>
> -- #interrupt-cells:	set to <1>
> -- ranges:	describes the translation of addresses for root ports and
> -		standard PCI regions.
> -- interrupt-map-mask and interrupt-map: standard PCI properties to define the
> -		mapping of the PCIe interface to interrupt numbers.
> -
> -Optional properties:
> -- msi-parent:	Link to the hardware entity that serves as the MSI controller
> -		for this PCIe controller.
> -- bus-range:	PCI bus numbers covered
> -
> -Example
> -	pcie_0: pcie@c00000000 {
> -		compatible = "altr,pcie-root-port-1.0";
> -		reg = <0xc0000000 0x20000000>,
> -			<0xff220000 0x00004000>;
> -		reg-names = "Txs", "Cra";
> -		interrupt-parent = <&hps_0_arm_gic_0>;
> -		interrupts = <0 40 4>;
> -		interrupt-controller;
> -		#interrupt-cells = <1>;
> -		bus-range = <0x0 0xFF>;
> -		device_type = "pci";
> -		msi-parent = <&msi_to_gic_gen_0>;
> -		#address-cells = <3>;
> -		#size-cells = <2>;
> -		interrupt-map-mask = <0 0 0 7>;
> -		interrupt-map = <0 0 0 1 &pcie_0 1>,
> -			            <0 0 0 2 &pcie_0 2>,
> -			            <0 0 0 3 &pcie_0 3>,
> -			            <0 0 0 4 &pcie_0 4>;
> -		ranges = <0x82000000 0x00000000 0x00000000 0xc0000000 0x00000000 0x10000000
> -			  0x82000000 0x00000000 0x10000000 0xd0000000 0x00000000 0x10000000>;
> -	};
> diff --git a/Documentation/devicetree/bindings/pci/altr,pcie-root-port.yaml b/Documentation/devicetree/bindings/pci/altr,pcie-root-port.yaml
> new file mode 100644
> index 000000000000..52533fccc134
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/altr,pcie-root-port.yaml
> @@ -0,0 +1,114 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +# Copyright (C) 2015, 2019, 2024, Intel Corporation
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/altr,pcie-root-port.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Altera PCIe Root Port
> +
> +maintainers:
> +  - Matthew Gerlach <matthew.gerlach@linux.intel.com>
> +
> +properties:
> +  compatible:
> +    enum:
> +      - altr,pcie-root-port-1.0
> +      - altr,pcie-root-port-2.0
> +
> +  reg:
> +    items:
> +      - description: TX slave port region
> +      - description: Control register access region
> +      - description: Hard IP region
> +    minItems: 2
> +
> +  reg-names:
> +    items:
> +      - const: Txs
> +      - const: Cra
> +      - const: Hip
> +    minItems: 2
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  interrupt-controller: true
> +
> +  interrupt-map-mask:
> +    items:
> +      - const: 0
> +      - const: 0
> +      - const: 0
> +      - const: 7
> +
> +  interrupt-map:
> +    maxItems: 4
> +
> +  "#interrupt-cells":
> +    const: 1
> +
> +  msi-parent: true
> +
> +required:
> +  - compatible
> +  - reg
> +  - reg-names
> +  - interrupts
> +  - "#interrupt-cells"
> +  - interrupt-controller
> +  - interrupt-map
> +  - interrupt-map-mask
> +
> +allOf:
> +  - $ref: /schemas/pci/pci-host-bridge.yaml#
> +  - if:
> +      properties:
> +        compatible:
> +          enum:
> +            - altr,pcie-root-port-1.0
> +    then:
> +      properties:
> +        reg:
> +          maxItems: 2
> +
> +        reg-names:
> +          maxItems: 2
> +
> +    else:
> +      properties:
> +        reg:
> +          minItems: 3
> +
> +        reg-names:
> +          minItems: 3
> +
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/interrupt-controller/irq.h>
> +    pcie_0: pcie@c00000000 {
> +        compatible = "altr,pcie-root-port-1.0";
> +        reg = <0xc0000000 0x20000000>,
> +              <0xff220000 0x00004000>;
> +        reg-names = "Txs", "Cra";
> +        interrupt-parent = <&hps_0_arm_gic_0>;
> +        interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
> +        interrupt-controller;
> +        #interrupt-cells = <1>;
> +        bus-range = <0x0 0xff>;
> +        device_type = "pci";
> +        msi-parent = <&msi_to_gic_gen_0>;
> +        #address-cells = <3>;
> +        #size-cells = <2>;
> +        interrupt-map-mask = <0 0 0 7>;
> +        interrupt-map = <0 0 0 1 &pcie_0 0 0 0 1>,
> +                        <0 0 0 2 &pcie_0 0 0 0 2>,
> +                        <0 0 0 3 &pcie_0 0 0 0 3>,
> +                        <0 0 0 4 &pcie_0 0 0 0 4>;
> +        ranges = <0x82000000 0x00000000 0x00000000 0xc0000000 0x00000000 0x10000000>,
> +                 <0x82000000 0x00000000 0x10000000 0xd0000000 0x00000000 0x10000000>;
> +    };
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 1e71f97fb674..53f239114400 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -17435,7 +17435,7 @@ PCI DRIVER FOR ALTERA PCIE IP
>  M:	Joyce Ooi <joyce.ooi@intel.com>
>  L:	linux-pci@vger.kernel.org
>  S:	Supported
> -F:	Documentation/devicetree/bindings/pci/altera-pcie.txt
> +F:	Documentation/devicetree/bindings/pci/altr,pcie-root-port.yaml
>  F:	drivers/pci/controller/pcie-altera.c
>  
>  PCI DRIVER FOR APPLIEDMICRO XGENE
> -- 
> 2.34.1
>