linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Bjorn Helgaas <helgaas@kernel.org>
To: Wei Huang <wei.huang2@amd.com>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-doc@vger.kernel.org, netdev@vger.kernel.org,
	Jonathan.Cameron@huawei.com, corbet@lwn.net, davem@davemloft.net,
	edumazet@google.com, kuba@kernel.org, pabeni@redhat.com,
	alex.williamson@redhat.com, gospo@broadcom.com,
	michael.chan@broadcom.com, ajit.khaparde@broadcom.com,
	somnath.kotur@broadcom.com, andrew.gospodarek@broadcom.com,
	manoj.panicker2@amd.com, Eric.VanTassell@amd.com,
	vadim.fedorenko@linux.dev, horms@kernel.org,
	bagasdotme@gmail.com, bhelgaas@google.com, lukas@wunner.de,
	paul.e.luse@intel.com, jing2.liu@intel.com
Subject: Re: [PATCH V4 00/12] PCIe TPH and cache direct injection support
Date: Wed, 4 Sep 2024 13:49:11 -0500	[thread overview]
Message-ID: <20240904184911.GA340610@bhelgaas> (raw)
In-Reply-To: <20240822204120.3634-1-wei.huang2@amd.com>

On Thu, Aug 22, 2024 at 03:41:08PM -0500, Wei Huang wrote:
> Hi All,
> 
> TPH (TLP Processing Hints) is a PCIe feature that allows endpoint
> devices to provide optimization hints for requests that target memory
> space. These hints, in a format called steering tag (ST), are provided
> in the requester's TLP headers and allow the system hardware, including
> the Root Complex, to optimize the utilization of platform resources
> for the requests.
> 
> Upcoming AMD hardware implement a new Cache Injection feature that
> leverages TPH. Cache Injection allows PCIe endpoints to inject I/O
> Coherent DMA writes directly into an L2 within the CCX (core complex)
> closest to the CPU core that will consume it. This technology is aimed
> at applications requiring high performance and low latency, such as
> networking and storage applications.

Thanks for this example, it's a great intro.  Suggest adding something
similar to a patch commit log, since the cover letter is harder to
find after this appears in git.

> This series introduces generic TPH support in Linux, allowing STs to be
> retrieved and used by PCIe endpoint drivers as needed. As a
> demonstration, it includes an example usage in the Broadcom BNXT driver.
> When running on Broadcom NICs with the appropriate firmware, it shows
> substantial memory bandwidth savings and better network bandwidth using
> real-world benchmarks. This solution is vendor-neutral and implemented
> based on industry standards (PCIe Spec and PCI FW Spec).
> 
> V3->V4:
>  * Rebase on top of the latest pci/next tree (tag: 6.11-rc1)

No need to rebase to pci/next; pci/main is where it will be applied.
But it currently applies cleanly to either, so no problem.

>  * Add new API functioins to query/enable/disable TPH support
>  * Make pcie_tph_set_st() completely independent from pcie_tph_get_cpu_st()
>  * Rewrite bnxt.c based on new APIs
>  * Remove documentation for now due to constantly changing API

I'd like to see this documentation included.  And updated if the API
changes, of course.

>  * Remove pci=notph, but keep pci=nostmode with better flow (Bjorn)

This seems backward to me.  I think "pci=notph" makes sense as a way
to completely disable the TPH feature in case a user trips over a
hardware or driver defect.

But "pci=nostmode" is advertised as a way to quantify the benefit of
Steering Tags, and that seems like it's of interest to developers but
not users.

So my advice would be to keep "pci=notph" and drop "pci=nostmode".

Bjorn

  parent reply	other threads:[~2024-09-04 18:49 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-22 20:41 [PATCH V4 00/12] PCIe TPH and cache direct injection support Wei Huang
2024-08-22 20:41 ` [PATCH V4 01/12] PCI: Introduce PCIe TPH support framework Wei Huang
2024-08-22 20:41 ` [PATCH V4 02/12] PCI: Add TPH related register definition Wei Huang
2024-09-04 19:52   ` Bjorn Helgaas
2024-09-05 15:08     ` Wei Huang
2024-09-05 16:41       ` Bjorn Helgaas
2024-09-16 21:08         ` Wei Huang
2024-08-22 20:41 ` [PATCH V4 03/12] PCI/TPH: Add pcie_tph_modes() to query TPH modes Wei Huang
2024-09-04 19:40   ` Bjorn Helgaas
2024-09-05 14:46     ` Wei Huang
2024-09-05 15:12       ` Bjorn Helgaas
2024-08-22 20:41 ` [PATCH V4 04/12] PCI/TPH: Add pcie_enable_tph() to enable TPH Wei Huang
2024-09-13 11:35   ` Alejandro Lucero Palau
2024-08-22 20:41 ` [PATCH V4 05/12] PCI/TPH: Add pcie_disable_tph() to disable TPH Wei Huang
2024-08-22 20:41 ` [PATCH V4 06/12] PCI/TPH: Add pcie_tph_enabled() to check TPH state Wei Huang
2024-08-22 20:41 ` [PATCH V4 07/12] PCI/TPH: Add pcie_tph_set_st_entry() to set ST tag Wei Huang
2024-08-26 11:46   ` kernel test robot
2024-08-22 20:41 ` [PATCH V4 08/12] PCI/TPH: Add pcie_tph_get_cpu_st() to get " Wei Huang
2024-09-14 10:10   ` Alejandro Lucero Palau
2024-09-16 18:58     ` Wei Huang
2024-08-22 20:41 ` [PATCH V4 09/12] PCI/TPH: Add save/restore support for TPH Wei Huang
2024-09-04 20:11   ` Bjorn Helgaas
2024-08-22 20:41 ` [PATCH V4 10/12] PCI/TPH: Add pci=nostmode to force TPH No ST Mode Wei Huang
2024-08-22 20:41 ` [PATCH V4 11/12] bnxt_en: Add TPH support in BNXT driver Wei Huang
2024-08-26 20:22   ` Jakub Kicinski
2024-08-26 20:56     ` Andy Gospodarek
2024-08-26 22:49       ` Jakub Kicinski
2024-08-27 14:50         ` Andy Gospodarek
2024-08-27 19:05           ` Jakub Kicinski
2024-08-27 19:20             ` Michael Chan
2024-09-05 15:06   ` Bjorn Helgaas
2024-09-11 15:37   ` Alejandro Lucero Palau
2024-09-16 18:55     ` Wei Huang
2024-09-18 17:31       ` Alejandro Lucero Palau
2024-09-19 16:14         ` Wei Huang
2024-08-22 20:41 ` [PATCH V4 12/12] bnxt_en: Pass NQ ID to the FW when allocating RX/RX AGG rings Wei Huang
2024-09-03 22:42 ` [PATCH V4 00/12] PCIe TPH and cache direct injection support Wei Huang
2024-09-04 18:49 ` Bjorn Helgaas [this message]
2024-09-04 19:48   ` Wei Huang
2024-09-04 20:03     ` Bjorn Helgaas
2024-09-04 20:20 ` Bjorn Helgaas
2024-09-05 15:45   ` Wei Huang
2024-09-05 16:44     ` Bjorn Helgaas

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240904184911.GA340610@bhelgaas \
    --to=helgaas@kernel.org \
    --cc=Eric.VanTassell@amd.com \
    --cc=Jonathan.Cameron@huawei.com \
    --cc=ajit.khaparde@broadcom.com \
    --cc=alex.williamson@redhat.com \
    --cc=andrew.gospodarek@broadcom.com \
    --cc=bagasdotme@gmail.com \
    --cc=bhelgaas@google.com \
    --cc=corbet@lwn.net \
    --cc=davem@davemloft.net \
    --cc=edumazet@google.com \
    --cc=gospo@broadcom.com \
    --cc=horms@kernel.org \
    --cc=jing2.liu@intel.com \
    --cc=kuba@kernel.org \
    --cc=linux-doc@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=lukas@wunner.de \
    --cc=manoj.panicker2@amd.com \
    --cc=michael.chan@broadcom.com \
    --cc=netdev@vger.kernel.org \
    --cc=pabeni@redhat.com \
    --cc=paul.e.luse@intel.com \
    --cc=somnath.kotur@broadcom.com \
    --cc=vadim.fedorenko@linux.dev \
    --cc=wei.huang2@amd.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).