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From: Rob Herring <robh@kernel.org>
To: Stanimir Varbanov <svarbanov@suse.de>
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-rpi-kernel@lists.infradead.org, linux-pci@vger.kernel.org,
	Broadcom internal kernel review list
	<bcm-kernel-feedback-list@broadcom.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Florian Fainelli <florian.fainelli@broadcom.com>,
	Jim Quinlan <jim2101024@gmail.com>,
	Nicolas Saenz Julienne <nsaenz@kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lpieralisi@kernel.org>,
	kw@linux.com, Philipp Zabel <p.zabel@pengutronix.de>,
	Andrea della Porta <andrea.porta@suse.com>,
	Phil Elwell <phil@raspberrypi.com>,
	Jonathan Bell <jonathan@raspberrypi.com>
Subject: Re: [PATCH v2 -next 01/11] dt-bindings: interrupt-controller: Add bcm2712 MSI-X DT bindings
Date: Wed, 11 Sep 2024 11:56:11 -0500	[thread overview]
Message-ID: <20240911165611.GA897131-robh@kernel.org> (raw)
In-Reply-To: <20240910151845.17308-2-svarbanov@suse.de>

On Tue, Sep 10, 2024 at 06:18:35PM +0300, Stanimir Varbanov wrote:
> Adds DT bindings for bcm2712 MSI-X interrupt peripheral controller.
> 
> Signed-off-by: Stanimir Varbanov <svarbanov@suse.de>
> ---
>  .../brcm,bcm2712-msix.yaml                    | 69 +++++++++++++++++++
>  1 file changed, 69 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2712-msix.yaml
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2712-msix.yaml b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2712-msix.yaml
> new file mode 100644
> index 000000000000..2b53dfa7c25e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2712-msix.yaml
> @@ -0,0 +1,69 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm2712-msix.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Broadcom bcm2712 MSI-X Interrupt Peripheral support
> +
> +maintainers:
> +  - Stanimir Varbanov <svarbanov@suse.de>
> +
> +description: >

Don't need '>' here.

> +  This interrupt controller is used to provide interrupt vectors to the
> +  generic interrupt controller (GIC) on bcm2712. It will be used as
> +  external MSI-X controller for PCIe root complex.
> +
> +allOf:
> +  - $ref: /schemas/interrupt-controller/msi-controller.yaml#
> +
> +properties:
> +  compatible:
> +    const: brcm,bcm2712-mip
> +
> +  reg:
> +    items:
> +      - description: base registers address
> +      - description: pcie message address
> +
> +  interrupt-controller: true
> +
> +  "#interrupt-cells":
> +    const: 2

What goes in these cells?

But really, what interrupts does an MSI controller handle? Or are we 
just putting "interrupt-controller" in here so that kernel handles this 
with IRQCHIP_DECLARE()?

> +
> +  msi-controller: true

Drop and use 'unevaluatedProperties'.

> +
> +  "#msi-cells":
> +    enum: [0]

const: 0

> +
> +  msi-ranges: true

Drop.

> +
> +additionalProperties: false
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupt-controller
> +  - "#interrupt-cells"
> +  - msi-controller
> +  - msi-ranges
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +    axi {
> +        #address-cells = <2>;
> +        #size-cells = <2>;
> +
> +        msi-controller@1000130000 {
> +            compatible = "brcm,bcm2712-mip";
> +            reg = <0x10 0x00130000 0x00 0xc0>,
> +                  <0xff 0xfffff000 0x00 0x1000>;
> +            msi-controller;
> +            #msi-cells = <0>;
> +            interrupt-controller;
> +            #interrupt-cells = <2>;
> +            msi-ranges = <&gicv2 GIC_SPI 128 IRQ_TYPE_EDGE_RISING 64>;
> +        };
> +    };
> -- 
> 2.35.3
> 

  reply	other threads:[~2024-09-11 16:56 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-10 15:18 [PATCH v2 -next 00/11] Add PCIe support for bcm2712 Stanimir Varbanov
2024-09-10 15:18 ` [PATCH v2 -next 01/11] dt-bindings: interrupt-controller: Add bcm2712 MSI-X DT bindings Stanimir Varbanov
2024-09-11 16:56   ` Rob Herring [this message]
2024-09-16 10:32     ` Stanimir Varbanov
2024-09-10 15:18 ` [PATCH v2 -next 02/11] dt-bindings: PCI: brcmstb: Update bindings for PCIe on bcm2712 Stanimir Varbanov
2024-09-11 16:57   ` Rob Herring (Arm)
2024-09-11 17:00   ` Florian Fainelli
2024-09-10 15:18 ` [PATCH v2 -next 03/11] irqchip: mip: Add Broadcom bcm2712 MSI-X interrupt controller Stanimir Varbanov
2024-09-10 15:58   ` Thomas Gleixner
2024-09-17 10:36     ` Stanimir Varbanov
2024-09-10 15:18 ` [PATCH v2 -next 04/11] PCI: brcmstb: Expand inbound size calculation helper Stanimir Varbanov
2024-09-10 16:59   ` Florian Fainelli
2024-09-17 10:38     ` Stanimir Varbanov
2024-09-10 15:18 ` [PATCH v2 -next 05/11] PCI: brcmstb: Restore CRS in RootCtl after prstn_n Stanimir Varbanov
2024-09-10 16:59   ` Florian Fainelli
2024-09-17 10:24     ` Stanimir Varbanov
2024-09-10 15:18 ` [PATCH v2 -next 06/11] PCI: brcmstb: Enable external MSI-X if available Stanimir Varbanov
2024-09-10 15:18 ` [PATCH v2 -next 07/11] PCI: brcmstb: Avoid turn off of bridge reset Stanimir Varbanov
2024-09-10 17:03   ` Florian Fainelli
2024-09-17 10:40     ` Stanimir Varbanov
2024-09-10 15:18 ` [PATCH v2 -next 08/11] PCI: brcmstb: Add bcm2712 support Stanimir Varbanov
2024-09-10 17:03   ` Florian Fainelli
2024-09-10 15:18 ` [PATCH v2 -next 09/11] PCI: brcmstb: Reuse config structure Stanimir Varbanov
2024-09-10 17:04   ` Florian Fainelli
2024-09-10 15:18 ` [PATCH v2 -next 10/11] arm64: dts: broadcom: bcm2712: Add PCIe DT nodes Stanimir Varbanov
2024-09-10 17:08   ` Florian Fainelli
2024-09-10 15:18 ` [PATCH v2 -next 11/11] arm64: dts: broadcom: bcm2712-rpi-5-b: Enable " Stanimir Varbanov
2024-09-11 13:50 ` [PATCH v2 -next 00/11] Add PCIe support for bcm2712 Rob Herring (Arm)

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