From: Simon Horman <horms@kernel.org>
To: Wei Huang <wei.huang2@amd.com>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-doc@vger.kernel.org, netdev@vger.kernel.org,
Jonathan.Cameron@huawei.com, helgaas@kernel.org, corbet@lwn.net,
davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
pabeni@redhat.com, alex.williamson@redhat.com,
gospo@broadcom.com, michael.chan@broadcom.com,
ajit.khaparde@broadcom.com, somnath.kotur@broadcom.com,
andrew.gospodarek@broadcom.com, manoj.panicker2@amd.com,
Eric.VanTassell@amd.com, vadim.fedorenko@linux.dev,
bagasdotme@gmail.com, bhelgaas@google.com, lukas@wunner.de,
paul.e.luse@intel.com, jing2.liu@intel.com
Subject: Re: [PATCH V5 1/5] PCI: Add TLP Processing Hints (TPH) support
Date: Tue, 17 Sep 2024 08:38:24 +0100 [thread overview]
Message-ID: <20240917073824.GJ167971@kernel.org> (raw)
In-Reply-To: <20240916205103.3882081-2-wei.huang2@amd.com>
On Mon, Sep 16, 2024 at 03:50:59PM -0500, Wei Huang wrote:
> Add support for PCIe TLP Processing Hints (TPH) support (see PCIe r6.2,
> sec 6.17).
>
> Add missing TPH register definitions in pci_regs.h, including the TPH
> Requester capability register, TPH Requester control register, TPH
> Completer capability, and the ST fields of MSI-X entry.
>
> Introduce pcie_enable_tph() and pcie_disable_tph(), enabling drivers to
> toggle TPH support and configure specific ST mode as needed. Also add a
> new kernel parameter, "pci=notph", allowing users to disable TPH support
> across the entire system.
>
> Co-developed-by: Jing Liu <jing2.liu@intel.com>
> Signed-off-by: Jing Liu <jing2.liu@intel.com>
> Co-developed-by: Paul Luse <paul.e.luse@linux.intel.com>
> Signed-off-by: Paul Luse <paul.e.luse@linux.intel.com>
> Co-developed-by: Eric Van Tassell <Eric.VanTassell@amd.com>
> Signed-off-by: Eric Van Tassell <Eric.VanTassell@amd.com>
> Signed-off-by: Wei Huang <wei.huang2@amd.com>
> Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
> Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
> Reviewed-by: Andy Gospodarek <andrew.gospodarek@broadcom.com>
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> Reviewed-by: Lukas Wunner <lukas@wunner.de>
...
> diff --git a/drivers/pci/pcie/tph.c b/drivers/pci/pcie/tph.c
...
> +/**
> + * pcie_enable_tph - Enable TPH support for device using a specific ST mode
> + * @pdev: PCI device
> + * @mode: ST mode to enable. Current supported modes include:
> + *
> + * - PCI_TPH_ST_NS_MODE: NO ST Mode
> + * - PCI_TPH_ST_IV_MODE: Interrupt Vector Mode
> + * - PCI_TPH_ST_DS_MODE: Device Specific Mode
> + *
> + * Checks whether the mode is actually supported by the device before enabling
> + * and returns an error if not. Additionally determines what types of requests,
> + * TPH or extended TPH, can be issued by the device based on its TPH requester
> + * capability and the Root Port's completer capability.
> + *
> + * Return: 0 on success, otherwise negative value (-errno)
> + */
> +int pcie_enable_tph(struct pci_dev *pdev, int mode)
> +{
> + u32 reg;
> + u8 dev_modes;
> + u8 rp_req_type;
> +
> + /* Honor "notph" kernel parameter */
> + if (pci_tph_disabled)
> + return -EINVAL;
> +
> + if (!pdev->tph_cap)
> + return -EINVAL;
> +
> + if (pdev->tph_enabled)
> + return -EBUSY;
> +
> + /* Sanitize and check ST mode comptability */
Hi Wei Huang, all,
Another minor nit from my side (the last one, I think):
comptability -> compatibility
Flagged by checkpatch.pl --codespell
> + mode &= PCI_TPH_CTRL_MODE_SEL_MASK;
> + dev_modes = get_st_modes(pdev);
> + if (!((1 << mode) & dev_modes))
> + return -EINVAL;
> +
> + pdev->tph_mode = mode;
> +
> + /* Get req_type supported by device and its Root Port */
> + pci_read_config_dword(pdev, pdev->tph_cap + PCI_TPH_CAP, ®);
> + if (FIELD_GET(PCI_TPH_CAP_EXT_TPH, reg))
> + pdev->tph_req_type = PCI_TPH_REQ_EXT_TPH;
> + else
> + pdev->tph_req_type = PCI_TPH_REQ_TPH_ONLY;
> +
> + rp_req_type = get_rp_completer_type(pdev);
> +
> + /* Final req_type is the smallest value of two */
> + pdev->tph_req_type = min(pdev->tph_req_type, rp_req_type);
> +
> + if (pdev->tph_req_type == PCI_TPH_REQ_DISABLE)
> + return -EINVAL;
> +
> + /* Write them into TPH control register */
> + pci_read_config_dword(pdev, pdev->tph_cap + PCI_TPH_CTRL, ®);
> +
> + reg &= ~PCI_TPH_CTRL_MODE_SEL_MASK;
> + reg |= FIELD_PREP(PCI_TPH_CTRL_MODE_SEL_MASK, pdev->tph_mode);
> +
> + reg &= ~PCI_TPH_CTRL_REQ_EN_MASK;
> + reg |= FIELD_PREP(PCI_TPH_CTRL_REQ_EN_MASK, pdev->tph_req_type);
> +
> + pci_write_config_dword(pdev, pdev->tph_cap + PCI_TPH_CTRL, reg);
> +
> + pdev->tph_enabled = 1;
> +
> + return 0;
> +}
> +EXPORT_SYMBOL(pcie_enable_tph);
...
next prev parent reply other threads:[~2024-09-17 7:38 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-16 20:50 [PATCH V5 0/5] PCIe TPH and cache direct injection support Wei Huang
2024-09-16 20:50 ` [PATCH V5 1/5] PCI: Add TLP Processing Hints (TPH) support Wei Huang
2024-09-17 7:38 ` Simon Horman [this message]
2024-09-23 7:43 ` Lukas Wunner
2024-09-24 16:34 ` Wei Huang
2024-09-23 12:07 ` Alejandro Lucero Palau
2024-09-23 20:27 ` Wei Huang
2024-09-24 14:33 ` Alejandro Lucero Palau
2024-09-16 20:51 ` [PATCH V5 2/5] PCI/TPH: Add Steering Tag support Wei Huang
2024-09-17 7:32 ` Simon Horman
2024-09-17 14:31 ` Wei Huang
2024-09-17 16:14 ` Simon Horman
2024-09-17 16:24 ` Simon Horman
2024-09-20 10:38 ` kernel test robot
2024-09-16 20:51 ` [PATCH V5 3/5] PCI/TPH: Add TPH documentation Wei Huang
2024-09-16 20:51 ` [PATCH V5 4/5] bnxt_en: Add TPH support in BNXT driver Wei Huang
2024-09-16 21:25 ` Wei Huang
2024-09-23 7:25 ` Lukas Wunner
2024-09-23 20:16 ` Wei Huang
2024-09-17 7:35 ` Simon Horman
2024-09-20 10:38 ` kernel test robot
2024-09-16 20:51 ` [PATCH V5 5/5] bnxt_en: Pass NQ ID to the FW when allocating RX/RX AGG rings Wei Huang
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