From: Bjorn Helgaas <helgaas@kernel.org>
To: Wei Huang <wei.huang2@amd.com>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-doc@vger.kernel.org, netdev@vger.kernel.org,
Jonathan.Cameron@huawei.com, corbet@lwn.net, davem@davemloft.net,
edumazet@google.com, kuba@kernel.org, pabeni@redhat.com,
alex.williamson@redhat.com, gospo@broadcom.com,
michael.chan@broadcom.com, ajit.khaparde@broadcom.com,
somnath.kotur@broadcom.com, andrew.gospodarek@broadcom.com,
manoj.panicker2@amd.com, Eric.VanTassell@amd.com,
vadim.fedorenko@linux.dev, horms@kernel.org,
bagasdotme@gmail.com, bhelgaas@google.com, lukas@wunner.de,
paul.e.luse@intel.com, jing2.liu@intel.com
Subject: Re: [PATCH V6 0/5] PCIe TPH and cache direct injection support
Date: Mon, 30 Sep 2024 11:55:19 -0500 [thread overview]
Message-ID: <20240930165519.GA179473@bhelgaas> (raw)
In-Reply-To: <20240927215653.1552411-1-wei.huang2@amd.com>
On Fri, Sep 27, 2024 at 04:56:48PM -0500, Wei Huang wrote:
> Hi All,
>
> TPH (TLP Processing Hints) is a PCIe feature that allows endpoint
> devices to provide optimization hints for requests that target memory
> space. These hints, in a format called steering tag (ST), are provided
> in the requester's TLP headers and allow the system hardware, including
> the Root Complex, to optimize the utilization of platform resources
> for the requests.
>
> Upcoming AMD hardware implement a new Cache Injection feature that
> leverages TPH. Cache Injection allows PCIe endpoints to inject I/O
> Coherent DMA writes directly into an L2 within the CCX (core complex)
> closest to the CPU core that will consume it. This technology is aimed
> at applications requiring high performance and low latency, such as
> networking and storage applications.
>
> This series introduces generic TPH support in Linux, allowing STs to be
> retrieved and used by PCIe endpoint drivers as needed. As a
> demonstration, it includes an example usage in the Broadcom BNXT driver.
> When running on Broadcom NICs with the appropriate firmware, it shows
> substantial memory bandwidth savings and better network bandwidth using
> real-world benchmarks. This solution is vendor-neutral and implemented
> based on industry standards (PCIe Spec and PCI FW Spec).
>
> V5->V6:
> * Rebase on top of pci/main (tag: pci-v6.12-changes)
> * Fix spellings and FIELD_PREP/bnxt.c compilation errors (Simon)
> * Move tph.c to drivers/pci directory (Lukas)
> * Remove CONFIG_ACPI dependency (Lukas)
> * Slightly re-arrange save/restore sequence (Lukas)
Thanks, I'll wait for the kernel test robot warnings to be resolved.
In patch 2/5, reword commit logs as imperative mood, e.g.,
s/X() is added/Add X()/, as you've already done for 1/5 and 3/5.
Maybe specify the ACPI _DSM name? This would help users know whether
their system can use this, or help them request that a vendor
implement the _DSM.
In patch 4/5, s/sustancial/substantial/. I guess the firmware you
refer to here means the system firmware that would provide the _DSM
required for this to work, i.e., not firmware on the NIC itself?
Would be helpful for users to have a hint as to how to tell whether to
expect a benefit on their system.
The 5/5 commit log could say what the patch *does*, not what *could*
be done (the subject does say what the patch does, but it's nice if
it's in the commit log as well so it's complete by itself). Also, a
hint that using the steering tag helps direct DMA writes to a cache
close to the CPU expected to consume it might be helpful to motivate
the patch.
Bjorn
next prev parent reply other threads:[~2024-09-30 16:55 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-27 21:56 [PATCH V6 0/5] PCIe TPH and cache direct injection support Wei Huang
2024-09-27 21:56 ` [PATCH V6 1/5] PCI: Add TLP Processing Hints (TPH) support Wei Huang
2024-10-02 12:46 ` Lukas Wunner
2024-09-27 21:56 ` [PATCH V6 2/5] PCI/TPH: Add Steering Tag support Wei Huang
2024-09-28 12:25 ` kernel test robot
2024-09-28 20:56 ` kernel test robot
2024-09-28 22:20 ` kernel test robot
2024-09-27 21:56 ` [PATCH V6 3/5] PCI/TPH: Add TPH documentation Wei Huang
2024-09-27 21:56 ` [PATCH V6 4/5] bnxt_en: Add TPH support in BNXT driver Wei Huang
2024-09-27 21:56 ` [PATCH V6 5/5] bnxt_en: Pass NQ ID to the FW when allocating RX/RX AGG rings Wei Huang
2024-09-30 16:55 ` Bjorn Helgaas [this message]
2024-10-02 17:19 ` [PATCH V6 0/5] PCIe TPH and cache direct injection support Wei Huang
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