From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from frasgout.his.huawei.com (frasgout.his.huawei.com [185.176.79.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E02381F4FBA; Wed, 30 Oct 2024 14:56:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.176.79.56 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730300187; cv=none; b=Ohfupe+5HUoOj0MUQy/v+NZli9tuwLD3vShoWIPuf4ZdkuPgH9dqf5zTh+FckuPao9zGEMAeBLHDUp/YJiiZFYCKdHeMM/R16zmkycLBtS/EKZe5UT2pNLIvDcLJTHBXoS6h1qtyVkrR5qkh7rnert0TuhoQX1sJSyU5QJwXXpo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730300187; c=relaxed/simple; bh=Nc9r3n+OXVQBLgWQU9aNggCLV+9LjFfRoOXAKiwCd0M=; h=Date:From:To:CC:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=bYgwRQ3t+51dyHUopD7O6IteAUbKpnYcwJq05vGwdcYCNNrpgCj30uciY4afXJzEaqq/dSMLWAPBsjO7tQyVNfGebUdiSO7q3rTcs/CGye01kObG800/ir8N2/gRWO7BhhmbnTh5+fs/Ag2HpDo+zctjcmXZOH9h7BYkjWxux5Y= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=Huawei.com; spf=pass smtp.mailfrom=huawei.com; arc=none smtp.client-ip=185.176.79.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=Huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Received: from mail.maildlp.com (unknown [172.18.186.231]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4Xdqnt1sJWz6GDpd; Wed, 30 Oct 2024 22:51:30 +0800 (CST) Received: from frapeml500008.china.huawei.com (unknown [7.182.85.71]) by mail.maildlp.com (Postfix) with ESMTPS id 7C190140A35; Wed, 30 Oct 2024 22:56:21 +0800 (CST) Received: from localhost (10.203.177.66) by frapeml500008.china.huawei.com (7.182.85.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Wed, 30 Oct 2024 15:56:20 +0100 Date: Wed, 30 Oct 2024 14:56:19 +0000 From: Jonathan Cameron To: Terry Bowman CC: , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH v2 04/14] PCI/AER: Modify AER driver logging to report CXL or PCIe bus error type Message-ID: <20241030145619.00005dbc@Huawei.com> In-Reply-To: <20241025210305.27499-5-terry.bowman@amd.com> References: <20241025210305.27499-1-terry.bowman@amd.com> <20241025210305.27499-5-terry.bowman@amd.com> Organization: Huawei Technologies Research and Development (UK) Ltd. X-Mailer: Claws Mail 4.1.0 (GTK 3.24.33; x86_64-w64-mingw32) Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: lhrpeml100011.china.huawei.com (7.191.174.247) To frapeml500008.china.huawei.com (7.182.85.71) On Fri, 25 Oct 2024 16:02:55 -0500 Terry Bowman wrote: > The AER driver and aer_event tracing currently log 'PCIe Bus Type' > for all errors. > > Update the driver and aer_event tracing to log 'CXL Bus Type' for CXL devices. > > Signed-off-by: Terry Bowman Looks fine to me. Reviewed-by: Jonathan Cameron +CC Mauro and Shiju. I assume this will be easy to add to rasdaemon useage of this tracepoint? > --- > drivers/pci/pcie/aer.c | 14 ++++++++------ > include/ras/ras_event.h | 9 ++++++--- > 2 files changed, 14 insertions(+), 9 deletions(-) > > diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c > index fe6edf26279e..53e9a11f6c0f 100644 > --- a/drivers/pci/pcie/aer.c > +++ b/drivers/pci/pcie/aer.c > @@ -699,13 +699,14 @@ static void __aer_print_error(struct pci_dev *dev, > > void aer_print_error(struct pci_dev *dev, struct aer_err_info *info) > { > + const char *bus_type = pcie_is_cxl(dev) ? "CXL" : "PCIe"; > int layer, agent; > int id = pci_dev_id(dev); > const char *level; > > if (!info->status) { > - pci_err(dev, "PCIe Bus Error: severity=%s, type=Inaccessible, (Unregistered Agent ID)\n", > - aer_error_severity_string[info->severity]); > + pci_err(dev, "%s Bus Error: severity=%s, type=Inaccessible, (Unregistered Agent ID)\n", > + bus_type, aer_error_severity_string[info->severity]); > goto out; > } > > @@ -714,8 +715,8 @@ void aer_print_error(struct pci_dev *dev, struct aer_err_info *info) > > level = (info->severity == AER_CORRECTABLE) ? KERN_WARNING : KERN_ERR; > > - pci_printk(level, dev, "PCIe Bus Error: severity=%s, type=%s, (%s)\n", > - aer_error_severity_string[info->severity], > + pci_printk(level, dev, "%s Bus Error: severity=%s, type=%s, (%s)\n", > + bus_type, aer_error_severity_string[info->severity], > aer_error_layer[layer], aer_agent_string[agent]); > > pci_printk(level, dev, " device [%04x:%04x] error status/mask=%08x/%08x\n", > @@ -730,7 +731,7 @@ void aer_print_error(struct pci_dev *dev, struct aer_err_info *info) > if (info->id && info->error_dev_num > 1 && info->id == id) > pci_err(dev, " Error of this Agent is reported first\n"); > > - trace_aer_event(dev_name(&dev->dev), (info->status & ~info->mask), > + trace_aer_event(dev_name(&dev->dev), bus_type, (info->status & ~info->mask), > info->severity, info->tlp_header_valid, &info->tlp); > } > > @@ -764,6 +765,7 @@ EXPORT_SYMBOL_GPL(cper_severity_to_aer); > void pci_print_aer(struct pci_dev *dev, int aer_severity, > struct aer_capability_regs *aer) > { > + const char *bus_type = pcie_is_cxl(dev) ? "CXL" : "PCIe"; > int layer, agent, tlp_header_valid = 0; > u32 status, mask; > struct aer_err_info info; > @@ -798,7 +800,7 @@ void pci_print_aer(struct pci_dev *dev, int aer_severity, > if (tlp_header_valid) > __print_tlp_header(dev, &aer->header_log); > > - trace_aer_event(dev_name(&dev->dev), (status & ~mask), > + trace_aer_event(dev_name(&dev->dev), bus_type, (status & ~mask), > aer_severity, tlp_header_valid, &aer->header_log); > } > EXPORT_SYMBOL_NS_GPL(pci_print_aer, CXL); > diff --git a/include/ras/ras_event.h b/include/ras/ras_event.h > index e5f7ee0864e7..1bf8e7050ba8 100644 > --- a/include/ras/ras_event.h > +++ b/include/ras/ras_event.h > @@ -297,15 +297,17 @@ TRACE_EVENT(non_standard_event, > > TRACE_EVENT(aer_event, > TP_PROTO(const char *dev_name, > + const char *bus_type, > const u32 status, > const u8 severity, > const u8 tlp_header_valid, > struct pcie_tlp_log *tlp), > > - TP_ARGS(dev_name, status, severity, tlp_header_valid, tlp), > + TP_ARGS(dev_name, bus_type, status, severity, tlp_header_valid, tlp), > > TP_STRUCT__entry( > __string( dev_name, dev_name ) > + __string( bus_type, bus_type ) > __field( u32, status ) > __field( u8, severity ) > __field( u8, tlp_header_valid) > @@ -314,6 +316,7 @@ TRACE_EVENT(aer_event, > > TP_fast_assign( > __assign_str(dev_name); > + __assign_str(bus_type); > __entry->status = status; > __entry->severity = severity; > __entry->tlp_header_valid = tlp_header_valid; > @@ -325,8 +328,8 @@ TRACE_EVENT(aer_event, > } > ), > > - TP_printk("%s PCIe Bus Error: severity=%s, %s, TLP Header=%s\n", > - __get_str(dev_name), > + TP_printk("%s %s Bus Error: severity=%s, %s, TLP Header=%s\n", > + __get_str(dev_name), __get_str(bus_type), > __entry->severity == AER_CORRECTABLE ? "Corrected" : > __entry->severity == AER_FATAL ? > "Fatal" : "Uncorrected, non-fatal",